參數(shù)資料
型號(hào)： M37733EHBXXXFS
元件分類： 微控制器/微處理器
英文描述： 16-BIT, UVPROM, 25 MHz, MICROCONTROLLER, CQCC80
封裝： WINDOWED, CERAMIC, LCC-80
文件頁數(shù)： 31/34頁
文件大?。?/td> 600K
代理商： M37733EHBXXXFS
6
MITSUBISHI MICROCOMPUTERS
M37733EHBXXXFP
M37733EHBFS
PROM VERSION OF M37733MHBXXXFP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
BASIC FUNCTION BLOCKS
The M37733EHBXXXFP has the same functions as the
M37733MHBXXXFP except for the following:
(1) The built-in ROM is PROM.
(2) The status of bit 3 of the oscillation circuit control register 1 (address
6F16) at a reset is different.
(3) The usage condition of bit 3 of the oscillation circuit control register
1 is different.
Accordingly, refer to the basic function blocks description in the
M37733MHBXXXFP except for Figure 1 (bit configuration of the
oscillation circuit control register 1) and Figure 3 (microcomputer
internal status during reset).
In the M37733EHBXXXFP, bit 3 of the oscillation circuit control
register 1 must be “1”. (Refer to Figure 1.) The status of this bit at
a reset is “1”.
Fig. 2 How to write data in oscillation circuit control register 1 (identical with Figure 64 in data sheet “M37733MHBXXXFP”)
Writing data “8016” (LDM instruction)
Reset clock prescaler
Writing data “5516” (LDM instruction)
Writing data “0Y16” (LDM instruction)
CC2 to CC0 selection bits
How to reset clock prescaler
How to write in CC2 to CC0 selection bits
Note. “Y” is the sum of bits to be set. For example, when
setting bits 2 and 1 to “1”, “Y” becomes “6”.
Next instruction
Note. Write to the oscillation circuit control
register 1 as the flow shown in Figure 2.
Oscillation circuit control register 1
Main clock division selection bit
0 : Main clock is divided by 2.
1 : Main clock is not divided by 2.
Main clock external input selection bit
0 : Main-clock oscillation circuit is operating by itself.
Watchdog timer is used at returning from STP state.
1 : Main-clock is input externally.
Watchdog timer is not used at returning from STP state.
Sub clock external input selection bit
0 : Sub-clock oscillation circuit is operating by itself.
Port P76 functions as XCOUT pin.
Watchdog timer is used at returning from STP state.
1 : Sub-clock is input externally.
Port P76 functions as I/O port.
Watchdog timer is not used at returning from STP state.
1 : Always “1” (“1” at reset)
0 : Always “0” (However, writing data “5516” shown in Figure 2 is possible.)
Clock prescaler reset bit
Address
6F16
CC0
CC1
CC2
0
76543
2
1
0
1
Fig. 1 Bit configuration of oscillation circuit control register 1 (corresponding to Figure 63 in data sheet “M37733MHBXXXFP”)
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