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MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fig. 33 Serial I/O port block diagram
SERIAL I/O PORTS
Two independent serial I/O ports are provided. Figure 33 shows a
block diagram of the serial I/O ports.
Bits 0, 1, and 2 of the UARTi (i = 0, 1) Transmit/Receive mode reg-
ister shown in Figure 34 are used to determine whether to use port
P8 as parallel port, clock synchronous serial I/O port, or asynchro-
nous (UART) serial I/O port using start and stop bits.
Figures 35 and 36 show the connections of receiver/transmitter
according to the mode.
Figure 37 shows the bit configuration of the UARTi transmit/re-
ceive control register.
Each communication method is described below.
Fig. 34 UART i Transmit/ Receive mode register bit
configuration
Data bus (odd)
Data bus (even)
0
0000
00
D7 D6 D5 D4 D3 D2 D1 D0
D8
Receive register
Receive
buffer register
UART0 (3716, 3616)
UART1 (3F16, 3E16)
Receive control
circuit
RxDi
Data bus (even)
D7 D6 D5 D4 D3 D2 D1 D0
D8
Transmission register
UART0 (3316, 3216)
UART1 (3B16, 3A16)
control circuit
Transmission
buffer register
f 2
f 16
f 64
f 512
CLKi
CTSi/RTSi
1/16 Divider
UART receive
Clock synchronous
1/16 Divider
Clock synchronous
1/2 Divider
Clock synchronous
(Internal clock)
Clock synchronous
(External clock)
1/(n + 1)
Divider
External
Internal
Clock source selection
Bit rate
generator
UART0(3116)
UART1(3916)
Receive clock
Transmission clock
Data bus (odd)
TxDi
Clock synchronous
(Internal clock)
UART transmission
UART 0 transmit/receive mode register 30 16
UART 1 transmit/receive mode register 38 16
Addresses
Serial communication method selection bits
0 0 0 : Parallel port
0 0 1 : Clock synchronous
1 0 0 : 7-bit UART
1 0 1 : 8-bit UART
1 1 0 : 9-bit UART
7654 3 2 1 0
Internal clock/External clock selection bit
0 : Internal clock
1 : External clock
Stop bit length selection bit
0 : 1 stop bit
1 : 2 stop bits
Even/Odd parity selection bit
0 : Odd parity
1 : Even parity
Parity enable selection bit
0 : No parity
1 : With parity
Sleep selection bit
0 : No sleep
1 : Sleep