參數(shù)資料
型號(hào)： M37560MFA-XXXGP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù)： 68/71頁(yè)
文件大?。?/td> 993K
代理商： M37560MFA-XXXGP
REVISION HISTORY
Rev.
Date
Description
Page
Summary
7560 Group (A version) Data Sheet
1.00 Feb. 18, 2003
1.02 Jul. 31, 2003
First edition issued
Power dissipation revised.
Table 1 Pin description (1) VCC VSS; Function description revised.
Fig.5 Memory expansion plan revised.
Fig.14 Port block diagram (1);
(4) Ports P16, P17,P2, P41, P42 and (5) Port P44 revised.
Fig.15 Port block diagram (2);
(7) Port P46 and (11) Port P54 revised.
Fig.16 Port block diagram (3);
(14) Port P55, (15) Ports P56, P57 and (17) Port P60 revised.
Fig.17 Port block diagram (4);
(19) Port P62 revised.
Fig.40 A-D converter block diagram
Voltage Multiplier (3 Times)
Description of order for operating the voltage multiplier revised.
ROM ORDERING METHOD revised.
Table 16 Recommended operating conditions (4); f(CNTR0) f(CNTR1) revised.
Table 18 Electrical characteristics (2); ICC revised.
Table 19 A-D converter characteristics (1); Note revised.
Table 20 A-D converter characteristics (2); Note revised.
Table 22 Timing requirements (1);
tc(SCLK), tWH(SCLK), tWL(SCLK), tsu(RxD-SCLK), th(SCLK-RxD); revised.
Table 23 Timing requirements (2);
tc(SCLK), tWH(SCLK), tWL(SCLK), tsu(RxD-SCLK), th(SCLK-RxD); revised.
Table 25 Switching characteristics (2) ; tr(SCLK1) tf(SCLK1) revised.
–
1
4
7
18
19
20
21
39
44
58
61
63
64
65
66
67
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