參數(shù)資料
型號: M37560MFA-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 16/73頁
文件大?。?/td> 888K
代理商: M37560MFA-XXXFP
Rev.1.02
Jul 31, 2003
page 21 of 69
7560 Group (A version)
Fig. 17 Port block diagram (4)
(18) Port P61
(19) Port P62
(20) Port P63
Serial I/O2 output
Serial I/O2 transmit end signal
Serial I/O2 synchronous clock selection bit
Serial I/O2 port selection bit
Pull-up control
Analog input pin selection bit
A-D converter input
P61/SOUT2 P-channel output disable bit
(21) COM0–COM3
(22) SEG0–SEG17
VL3
VL2
VL1
VSS
VL2/VL3
VL1/VSS
(23) Port P70
INT0 input
Serial I/O2 synchronous clock
selection bit
Serial I/O2 clock output
Serial I/O2 clock input
Serial I/O2 port selection bit
Synchronous clock output pin
selection bit
A-D converter input
Serial I/O2 clock output
A-D converter input
Direction
register
Port latch
Data bus
Pull-up control
Direction
register
Port latch
Data bus
Analog input pin selection bit
Pull-up control
Direction
register
Port latch
Data bus
Analog input pin selection bit
Serial I/O2 synchronous clock selection bit
Serial I/O2 port selection bit
Data bus
The gate input signal of each
transistor is controlled by the LCD
duty ratio and the bias value.
The voltage applied to the sources of P-
channel and N-channel transistors is the
controlled voltage by the bias value.
Synchronous clock output pin selection
bit
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