參數(shù)資料
型號： M37560M2-XXXFP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機
文件頁數(shù)： 14/65頁
文件大小： 955K
代理商： M37560M2-XXXFP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
14
I/O PORTS
Direction Registers
The I/O ports (ports P0, P1, P2, P4, P5, P6, P7
1
–
P7
7
) have direc-
tion registers which determine the input/output direction of each
individual pin. (Ports P0
0
–
P0
7
are shared with bit 0 of the port P0
direction register, and ports P1
0
–
P1
5
shared with bit 0 of the port
P1 direction register.) Each bit in a direction register corresponds
to one pin, and each pin can be set to be input port or output port.
When
“
0
”
is written to the bit corresponding to a pin, that pin be-
comes an input pin. When
“
1
”
is written to that bit, that pin be-
comes an output pin.
If data is read from a pin set to output, the value of the port output
latch is read, not the value of the pin itself. Pins set to input are
floating. If a pin set to input is written to, only the port output latch
is written to and the pin remains floating.
Port P3 Output Control Register
Bit 0 of the port P3 output control register (address 0007
16
) en-
ables control of the output of ports P3
0
–
P3
7
.
When the bit is set to
“
1
”
, the port output function is valid.
When resetting, bit 0 of the port P3 output control register is set to
“
0
”
(the port output function is invalid) and pulled up.
Pull-up Control
By setting the PULL register A (address 0016
16
) or the PULL reg-
ister B (address 0017
16
), ports P0 to P2, P4 to P6 can control pull-
up with a program.
However, the contents of PULL register A and PULL register B do
not affect ports programmed as the output ports.
The PULL register A setting is invalid for pins set to segment out-
put with the segment output enable register.
Fig. 11 Structure of PULL register A and PULL register B
P0
0
, P0
1
pull-up
P0
2
, P0
3
pull-up
P0
4
–
P0
7
pull-up
P1
0
–
P1
3
pull-up
P1
4
, P1
5
pull-up
P1
6
, P1
7
pull-up
P2
0
–
P2
3
pull-up
P2
4
–
P2
7
pull-up
P
(
P
U
L
L
L
r
A
e
g
:
i
a
s
t
d
e
d
r
r
A
e
U
L
s
s
0
0
1
6
1
6
)
b
7
b
0
P4
1
–
P4
3
pull-up
P4
4
–
P4
7
pull-up
P5
0
–
P5
3
pull-up
P5
4
–
P5
7
pull-up
P6
0
–
P6
3
pull-up
P6
4
–
P6
7
pull-up
Not used (return
“
0
”
when read)
0
1
:
:
D
E
i
n
s
a
a
b
b
l
e
e
l
PULL register B
(PULLB : address 0017
16
)
b
7
b
0
Note:
The contents of PULL register A and PULL register B
do not affect ports programmed as the output port.
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