參數資料
型號： M37546G4-XXXGP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP32
封裝： 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件頁數： 71/105頁
文件大?。?/td> 1105K
代理商： M37546G4-XXXGP
REJ03B0160-0122 Rev.1.22 Mar 13, 2009
page 66 of 100
7546 Group
Fig. 85 Assignment of Function set ROM area
Fig. 86 Structure of Function set ROM data 0
Function set ROM invalid bit (Note 1)
0:
Setting of bit 5 to bit 0 of function set
ROM data 2 valid
1:
Setting of bit 5 to bit 0 of function set
ROM data 2 invalid
b7
Set “0” to these bits.
Set “0” to this bit certainly.
Low voltage detection circuit valid bit
0: Low voltage detection circuit invalid
1: Low voltage detection circuit valid
Low voltage detection circuit valid bit
in the stop mode (Note 2)
0: Low voltage detection circuit invalid
in the stop mode
1: Low voltage detection circuit valid
in the stop mode
Set “1” to this bit.
Function set ROM data 0
(FSROM0: address FFD816)
b0
10
0
Note 1: When “1” is set to this bit, the setting values of bit 5 to bit 0 of function
set ROM data 2 become invalid, and these functions can be set by
program. (this bit does not affect on other bits than bit 5 to bit 0 of
function set ROM data 2.)
2: When the Low voltage detection circuit is set to be valid in the stop
mode, the dissipation current in the stop mode is increased.
Renesas shipment test area
Function set ROM data 0
Function set ROM data 2
Function set ROM data 1
ROM code protect
Interrupt vector area
Addres
FFD416
FFD516
FFD616
FFD716
FFD816
FFD916
FFDA16
FFDB16
Note: The random data are written into the
Renesas shipment test areas
(address FFD416 to address FFD716).
Do not rewrite the data of these areas.
When checksum is included in user program,
avoid assigning it to these areas.
Fig. 88 Structure of Function set ROM data 2
Function set ROM data 1
FSROM1 (FFD916)
b7
b0
Set “0” to these bits certainly.
00 0 0
0 00
0
Watchdog timer start selection bit (Note 1)
0 : Watchdog timer starts automatically after reset
1 : Watchdog timer is inactive after reset
b7
On-chip oscillator control bit (Note 1)
0 : Stop of on-chip oscillator disabled
1 : Stop of on-chip oscillator enabled
Watchdog timer source clock
selection bit (Note 1)
0 : On-chip oscillator/16
1 : On-chip oscillator/16 or f(XIN)/16
Watchdog timer H count source
selection bit (Note 1)
0 :Watchdog timer L underflow
1 : Count source of watchdog timer L
(The clock selected by the watchdog timer
source clock selection bit (bit 0))
STP instruction function selection bit (Note 1)
0 : System enters into the stop mode
at the STP instruction execution
1 : Internal reset occurs at the STP instruction execution
Oscillation mode selection bit (Note 1)
0 : Ceramic oscillation
1 : RC oscillation
Function set ROM data 2
(FSROM2: address FFDA16)
b0
00
Note 1: These functions can be active when “0” is set to function set
ROM valid bit (bit 0 of function set ROM data 0).
Set “0” to these bits certainly.
● Function set ROM
Fig. 85 shows the Assignment of Function set ROM area.
The random data are written to the Renesas shipment test areas
(addresses FFD416 to address FFD716).
Do not rewrite the data of these areas.
When the checksum is included in the user program, avoid as-
signing it to these areas.
The function set ROM data 0 to 2 (addresses FFD816 to FFDA16)
are used to set the peripheral function.
Data set to these areas become valid after releasing reset.
The ROM code protect to disable the reading of the built-in
QzROM area is assigned to address FFDB16.
[Function set ROM data] FSROM0, FSROM1, FSROM2
Function set ROM data 0 to 2 (addresses FFD816 to FFDA16) are
used to set modes of peripheral functions.
By setting values to these areas, the operation mode of each pe-
ripheral function are set after releasing reset.
Refer to the descriptions of peripheral functions for the details of
operation of peripheral functions.
- CPU mode register
- Watchdog timer
- Low voltage detection circuit
When “1” is set to bit 0 of function set ROM data 0 (address
FFD816), the written values to bit 5 to bit 0 of function set ROM
data 2 (address FFDA16) can become invalid.
When the values of bit 5 to bit 0 of function set ROM data 2 (ad-
dress FFDA16) are invalid, the operation mode of the peripheral
functions can be set by setting the related registers.
[ROM code protect]
By setting “0016” to ROM code protect (address FFDB16), reading
of the built-in QzROM by the serial programmer is disabled.
Fig. 87 Structure of Function set ROM data 1
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參數描述
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