參數(shù)資料
型號: M37545GC-XXXGP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP32
封裝: 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件頁數(shù): 4/65頁
文件大小: 782K
代理商: M37545GC-XXXGP
Rev.1.07
Mar 19, 2009
Page 10 of 60
REJ03B0140-0107
7545 Group
Fig. 8 Register push and pop at interrupt generation and subroutine call
Execute JSR
On-going Routine
M (S)
(PCH)
M (S)
(PCL)
Execute RTS
(PCL)
M (S)
(S)
(S + 1)
(S)
(S + 1)
(PCH)
M (S)
Subroutine
Restore Return
Address
Store Return Address
on Stack
M (S)
(PS)
Execute RTI
(PS)
M (S)
Interrupt
Service Routine
Restore Contents of
Processor Status Register
M (S)
(PCH)
(S)
(S - 1)
M (S)
(PCL)
M (S)
(PCH)
M (S)
Restore Return
Address
I Flag “0” to “1”
Fetch the Jump Vector
Store Return Address
on Stack
Store Contents of Processor
Status Register on Stack
Interrupt request
(Note)
Note : The condition to enable the interrupt
Interrupt enable bit is “1”
Interrupt disable flag is “0”
(S)
(S - 1)
(S)
(S - 1)
(S)
(S + 1)
(S)
(S + 1)
(S)
(S + 1)
(S)
(S - 1)
(S)
(S - 1)
Table 5
Push and pop instructions of accumulator or processor status register
Push instruction to stack
Pop instruction from stack
Accumulator
PHA
PLA
Processor status register
PHP
PLP
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