Rev.1.07
Mar 19, 2009
Page 58 of 60
REJ03B0140-0107
7545 Group
Termination of Unused Pins
1. Terminate unused pins
Perform the following wiring at the shortest possible distance (20
mm or less) from microcomputer pins.
(1) I/O ports
Set the I/O ports for the input mode and connect each pin to VCC
or VSS through each resistor of 1 k
to 10 k. The port which
can select a built-in pull-up resistor can also use the built-in pull-
up resistor.
When using the I/O ports as the output mode, open them at “L”
or “H”.
When opening them in the output mode, the input mode of the
initial status remains until the mode of the ports is switched
over to the output mode by the program after reset. Thus, the
potential at these pins is undefined and the power source
current may increase in the input mode. With regard to an
effects on the system, thoroughly perform system evaluation
on the user side.
Since the direction register setup may be changed because of a
program runaway or noise, set direction registers by program
periodically to increase the reliability of program.
2. Termination remarks
(1) I/O ports setting as input mode
(1) Do not open in the input mode.
<Reason>
The power source current may increase depending on the first-
stage circuit.
An effect due to noise may be easily produced as compared
with proper termination (1) shown on the above “1. Terminate
unused pins”.
(2) Do not connect to VCC or VSS directly.
<Reason>
If the direction register setup changes for the output mode
because of a program runaway or noise, a short circuit may
occur.
(3) Do not connect multiple ports in a lump to VCC or VSS
through a resistor.
<Reason>
If the direction register setup changes for the output mode
because of a program runaway or noise, a short circuit may occur
between ports.
Notes on Interrupts
1. Change of relevant register settings
When not requiring for the interrupt occurrence synchronous
with the following case, take the sequence shown in
Figure 4. When switching external interrupt active edge
When switching interrupt sources of an interrupt vector
address where two or more interrupt sources are allocated
Fig 4.
Sequence of changing relevant register
<Reason>
When setting the followings, the interrupt request bit of the
corresponding interrupt may be set to “1”.
When switching external interrupt active edge
INT0 interrupt edge selection bit (bit 0 of Interrupt edge
selection register (address 3A16))
INT1 interrupt edge selection bit (bit 1 of Interrupt edge
selection register)
Key-on wakeup edge selection register (address 1916)
2. Check of interrupt request bit
When executing the BBC or BBS instruction to determine an
interrupt request bit immediately after this bit is set to “0”, take
the following sequence.
<Reason>
If the BBC or BBS instruction is executed immediately after an
interrupt request bit is cleared to “0”, the value of the interrupt
request bit before being cleared to “0” is read.
Fig 5.
Sequence of check of interrupt request bit
Set the interrupt edge selection bit, active edge switch bit,
or the interrupt source selection bit.
NOP (One or more instructions)
Set the corresponding interrupt request bit to g0h
(no interrupt request issued).
Set the corresponding interrupt enable bit to g0h (disabled).
Set the corresponding interrupt enable bit to g1h (enabled).
Set the interrupt request bit to g0h (no interrupt issued)
NOP (One or more instructions)
Execute the BBC or BBS instruction