參數(shù)資料
型號: M37542M2-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
封裝: 8.9 X 28 MM, 1.78 MM PITCH, PLASTIC, SDIP-32
文件頁數(shù): 105/124頁
文件大小: 1238K
代理商: M37542M2-XXXSP
7542 Group
Rev.3.03
Jul 11, 2008
Page 79 of 117
REJ03B0006-0303
Block Erase Command (2016/D016)
By writing the command code “2016” in the first bus cycle and the
confirmation command code “D016” and the block address in the
second bus cycle that follows, the block erase (erase and erase
verify) operation starts for the block address of the flash memory
to be specified.
Whether the block erase operation is completed can be confirmed
by read status register or the RY/BY status flag of flash memory
control register. At the same time the block erase operation starts,
the read status register mode is automatically entered, so that the
contents of the status register can be read out. The status register
bit 7 (SR7) is set to “0” at the same time the block erase operation
starts and is returned to “1” upon completion of the block erase
operation. In this case, the read status register mode remains ac-
tive until the read array command (FF16) is written.
The RY/BY status flag is “0” during block erase operation and “1”
when the block erase operation is completed as is the status reg-
ister bit 7.
After the block erase ends, erase results can be checked by read-
ing the status register. For details, refer to the section where the
status register is detailed.
Fig. 103 Erase flowchart
Write “2016
“D016
Block address
Erase completed
(write read command “
FF16)
NO
YES
Start
Write
SR5 = “0” ?
Erase error
YES
NO
SR7 = “1”?
or
RY/BY = “1”?
Read status register
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