SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7542 Group
MITSUBISHI MICROCOMPUTERS
59
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Fig. 80 Structure of MISRG
q Oscillation stop detection circuit
The oscillation stop detection circuit is used for reset occurrence
when a ceramic resonator or RC oscillation circuit stops by dis-
connection. To use this circuit, set a built-in ring oscillator to be in
active.
The oscillation stop detection circuit is in active to set “1” to the
ceramic or RC oscillation stop detection function active bit. When
the oscillation stop detection circuit is in active, ceramic or RC os-
cillation is watched by the built-in ring oscillator. When stop of
ceramic or RC oscillation is detected, the oscillation stop detection
status bit is set to “1”. While “1” is set to the oscillation stop reset
bit, internal reset occurs when oscillation stop is detected.
The external reset and the oscillation stop reset can be discrimi-
nated by reading the oscillation stop detection status bit.
The oscillation stop detection status bit retains “1”, not initialized,
when the oscillation stop reset occurs. The oscillation stop detec-
tion status bit is initialized to “0” when the external reset occurs.
Accordingly, reset by oscillation stop can be confirmed by using
this bit.
s Notes on Oscillation Stop Detection Circuit
When the oscillation stop reset bit is set to “0”, internal reset
does not occur. If the ceramic or RC oscillation is selected for
the CPU clock, MCU will be locked when the ceramic or RC os-
cillation is stopped. So when the ceramic or RC oscillation is
selected for the main clock, set the oscillation stop reset bit to
“1”. (State 2’a of Fig. 81)
Ceramic or RC oscillation stop detection function active bit is not
cleared by the oscillation stop internal reset. Accordingly, the
oscillation stop detection circuit is in active when system is re-
leased from internal reset cause of oscillation stop detection.
Oscillation stop detection status bit is initialized by the following
operation.
(1) External reset
(2) Write “0” data to the ceramic or RC oscillation stop detection
function active bit.
The oscillation stop detection circuit is not included in the emu-
lator MCU “M37542RSS”.
MISRG(address 003816, initial value: 0016)
b7
b0
Oscillation stabilization time set bit after
release of the STP instruction
0: Set “0116” in timer1, and “FF16”
in prescaler 1 automatically
1: Not set automatically
Ceramic or RC oscillation stop detection
function active bit
0: Detection function inactive
1: Detection function active
Oscillation stop reset bit
0: Oscillation stop reset disabled
1: Oscillation stop reset enabled
Oscillation stop detection status bit
0: Oscillation stop not detected
1: Oscillation stop detected
Not used (return “0” when read)
Reserved bits
(Do not write “1” to these bits)