參數(shù)資料
型號(hào)： M37515M4-XXXHP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁(yè)數(shù)： 41/54頁(yè)
文件大小： 749K
代理商： M37515M4-XXXHP
46
M37515M4-XXXHP
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 19 Switching characteristics 1
(VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time (Note 2)
CMOS output falling time (Note 2)
tWH (SCLK)
tWL (SCLK)
td (SCLK-TXD)
tv (SCLK-TXD)
tr (SCLK)
tf (SCLK)
tr (CMOS)
tf (CMOS)
Limits
ns
Parameter
Min.
tC(SCLK)/2–30
–30
Typ.
10
Max.
140
30
Symbol
Unit
Notes 1: For tWH(SCLK), tWL(SCLK), when the P51/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
2: The XOUT pin is excluded.
Table 20 Switching characteristics 2
(VCC = 2.7 to 4.0 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time (Note 2)
CMOS output falling time (Note 2)
tWH (SCLK)
tWL (SCLK)
td (SCLK-TXD)
tv (SCLK-TXD)
tr (SCLK)
tf (SCLK)
tr (CMOS)
tf (CMOS)
Limits
ns
Parameter
Min.
tC(SCLK)/2–50
–30
Typ.
20
Max.
350
50
Symbol
Unit
Notes 1: For tWH(SCLK), tWL(SCLK), when the P51/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
2: The XOUT pin is excluded.
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