參數(shù)資料
型號: M37512FCH-XXXHP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 62/87頁
文件大?。?/td> 879K
代理商: M37512FCH-XXXHP
Feb 18, 2005
page 65 of 85
REJ03B0122-0101
7512 Group
Precautions on CPU Rewrite Mode
Described below are the precautions to be observed when rewriting
the flash memory in CPU rewrite mode.
(1) Operation speed
During CPU rewrite mode, set the internal clock frequency 4.0
MHz or less using the main clock division ratio selection bits (bit
6, 7 at 003B16).
(2) Instructions inhibited against use
The instructions which refer to the internal data of the flash
memory cannot be used during EW0 mode .
(3) Interrupts inhibited against use
The interrupts cannot be used during EW0 mode because they
refer to the internal data of the flash memory.
In the EW1 mode, the interrupts cannot be used during program
operation or erase operation which is disabled erase suspend
function.
(4) Watchdog timer
In case of the watchdog timer has been running already, the in-
ternal reset generated by watchdog timer underflow does not
happen, because of watchdog timer is always clearing during
program or erase operation.
(5) Reset
Reset is always valid. In case of CNVSS = H when reset is re-
leased, boot mode is active. So the program starts from the ad-
dress contained in address FFFC16 and FFFD16 in boot ROM
area.
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