參數(shù)資料
型號: M37512F8HHP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 4 MHz, MICROCONTROLLER, PQFP48
封裝: 7 X 7 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 63/87頁
文件大小: 879K
代理商: M37512F8HHP
Feb 18, 2005
page 66 of 85
REJ03B0122-0101
7512 Group
Software Commands (CPU Rewrite Mode)
Table 16 lists the software commands.
After setting the CPU Rewrite Mode Select Bit of the flash memory
control register to “1”, execute a software command to specify an
erase or program operation.
Each software command is explained below.
qRead Array Command (FF16)
The read array mode is entered by writing the command code
“FF16” in the first bus cycle. When an address to be read is input in
one of the bus cycles that follow, the contents of the specified ad-
dress are read out at the data bus (D0 to D7).
The read array mode is retained intact until another command is
written.
qRead Status Register Command (7016)
The read status register mode is entered by writing the command
code “7016” in the first bus cycle. The contents of the status regis-
ter are read out at the data bus (D0 to D7) by a read in the second
bus cycle.
The status register is explained in the next section.
In the EW1 mode, do not execute this command.
qClear Status Register Command (5016)
This command is used to clear the bits SR4 and SR5 of the status
register after they have been set. These bits indicate that opera-
tion has ended in an error. To use this command, write the
command code “5016” in the first bus cycle.
qProgram Command (4016)
Program operation starts when the command code “4016” is writ-
ten in the first bus cycle. Then, if the address and data to program
are written in the 2nd bus cycle, program operation (data program-
ming and verification will start.
Whether the write operation is completed can be confirmed by
_____
reading the status register or the RY/BY Status Flag.
____
The RY/BY Status Flag is “0” (busy) during write operation and “1”
(ready) when the write operation is completed as is the status reg-
ister bit 7.
Table 16 List of software commands (CPU rewrite mode)
Do not execute this command for rewrite control program address
in the EW1 mode.
In the E/W0 mode, when the program starts, the read status reg-
ister mode is entered automatically and the contents of the status
register is read at the data bus (D0 to D7). The status register bit 7
(SR7) is set to “0” at the same time the write operation starts and
is returned to “1” upon completion of the write operation. In this
case, the read status register mode remains active until the read
array command (FF16) is written.
Fig. 73 Program flowchart
Start
Write 4016
Status register
read
Program completed
NO
YES
Write address
Write data
Program
error
NO
YES
RY/BY status flag = “1 ”?
Write
Program status flag = “0 ”?
Command
Program
Clear status register
Read array
Read status register
X
First bus cycle
Second bus cycle
FF16
7016
5016
4016
Write
X
SRD
Read
Write
(Note 2)
WA (Note 3)
WD (Note 3)
Block erase
2016
Write
D016
Write
BA (Note 4)
Mode
Address
Mode
Address
Data
(D0 to D7)
(Note 1)
Notes 1: X denotes a given address in the User ROM area .
2: SRD = Status Register Data
3: WA = Write Address, WD = Write Data
4: BA = Block Address to be erased (Input the maximum address of each block.)
Cycle number
1
2
1
2
X
Data
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