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參數(shù)資料
| 型號： | M374S1723FTU-C7A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | SDRAM Unbuffered Module |
| 中文描述： | 內(nèi)存緩沖模塊 |
| 文件頁數(shù)： | 13/26頁 |
| 文件大?。?/td> | 486K |
| 代理商： | M374S1723FTU-C7A |
64MB, 128MB, 256MB Unbuffered DIMM
DC CHARACTERISTICS
Rev. 1.3 May 2004
SDRAM
M374S1723FTS(U) (16M x 72, 128MB Module)
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
Version
7A
Unit
Note
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
O
= 0 mA
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
I
O
= 0 mA
Page burst
4Banks activated
t
CCD
= 2CLKs
t
RC
≥
t
RC
(min)
CKE
≤
0.2V
810
mA
1
Precharge standby current
in power-down mode
I
CC2
P
I
CC2
PS
18
18
mA
Precharge standby current
in non power-down mode
I
CC2
N
180
mA
I
CC2
NS
90
Active standby current in
power-down mode
I
CC3
P
I
CC3
PS
45
45
mA
Active standby current in
non power-down mode
(One bank active)
I
CC3
N
270
mA
I
CC3
NS
225
mA
Operating current
(Burst mode)
I
CC4
990
mA
1
Refresh current
Self refresh current
I
CC5
I
CC6
1800
18
mA
mA
2
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
Version
7A
Unit
Note
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
O
= 0 mA
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
CKE
≤
V
IL
(max), t
CC
= 10ns
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
I
O
= 0 mA
Page burst
4Banks activated
t
CCD
= 2CLKs
t
RC
≥
t
RC
(min)
CKE
≤
0.2V
960
mA
1
Precharge standby current
in power-down mode
I
CC2
P
I
CC2
PS
32
32
mA
Precharge standby current
in non power-down mode
I
CC2
N
320
mA
I
CC2
NS
160
Active standby current in
power-down mode
I
CC3
P
I
CC3
PS
80
80
mA
Active standby current in
non power-down mode
(One bank active)
I
CC3
N
480
mA
I
CC3
NS
400
mA
Operating current
(Burst mode)
I
CC4
1120
mA
1
Refresh current
Self refresh current
I
CC5
I
CC6
1840
32
mA
mA
2
M366S3323FTS(U) (32M x 64, 256MB Module)
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing level is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ
)
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