
1-151
7470/7471/7477/7478 GROUP USER’S MANUAL
HARDWARE
1.15 Reset
1.15.2 Internal status immediately after reset release
Figure 1.15.2 shows an internal register status immediately after reset release.
Fig. 1.15.2 Internal status immediately after reset release
0016
00 0 0
0016
10 0 0
00
0016
00 0
00
00 0
0
00 0 0 0
1
00 0 0
00
Contents of address FFFF 16
00 0 0
0
Address
00 0 0
00
00 0 0
0
(1)
Port P0 direction register (P0D)
Contents of address FFFE 16
(2)
Port P1 direction register (P1D)
(4)
Port P4 direction register (P4D)
(5)
Port P0 pull-up control register
(6)
Port P1–P5 pull-up control register
(In the 7470/7477 group, port P1–P4 pull-up control register)
(7)
Edge polarity selection register (EG)
(8)
A-D control register (ADCON)
(13) Timer FF register (TF)
(14) Timer 12 mode register (T12M)
(15) Timer 34 mode register (T34M)
(16) Timer mode register 2 (TM2)
(17) CPU mode register (CPUM)
(18) Interrupt request register 1 (IR1)
(19) Interrupt request register 2 (IR2)
(20) Interrupt control register 1 (IE1)
(21) Interrupt control register 2 (IE2)
(22) Program counter (PC H)
(23) Processor status register (PS)
(3)
Port P2 direction register (P2D)
(The 7477/7478 group is not provided.)
0016
000 0
00 00
0
(9)
Serial I/O mode register (SM)
(The 7477/7478 group is not provided.)
(10) Serial I/O status register (SIOSTS)
(The 7470/7471 group is not provided.)
0716
(13) Timer 3 (T3)
(14) Timer 4 (T4)
10
1 1 11
FF16
00
0
: The contents are undefined at reset release.
(C116)
(C316)
(C516)
(C916)
(D016)
(D116)
(D416)
(D916)
(DC16)
(E116)
(E216)
(E316)
(F216)
(F316)
(F716)
(F816)
(F916)
(FA16)
(FB16)
(FC16)
(FD16)
(FE16)
(FF16)
(11) Serial I/O control register (SIOCON)
(The 7470/7471 group is not provided.)
(12) UART control register (UARTCON)
(The 7470/7471 group is not provided.)
(PCL)
Note : Since the contents of the registers and RAM not mentioned above are undefined at reset,
initialize them by software.
The bits are different depending on the product. Refer to the structure of each register.