List of figures
7470/7471/7477/7478 GROUP USER’S MANUAL
vi
Fig. 3.1.9 Structure of Serial I/O register ..................................................................................... 3-6
Fig. 3.1.10 Structure of Secial I/O counter and Byte counter .................................................. 3-6
Fig. 3.1.11 Structure of Transmit/receive buffer register ........................................................... 3-7
Fig. 3.1.12 Structure of Serial I/O status register ....................................................................... 3-7
Fig. 3.1.13 Structure of Serial I/O control register ......................................................................3-8
Fig. 3.1.14 Structure of UART control register ............................................................................ 3-8
Fig. 3.1.15 Structure of Timers 1 to 4 .......................................................................................... 3-9
Fig. 3.1.16 Structure of Timer FF register ................................................................................... 3-9
Fig. 3.1.17 Structure of Timer 12 mode register ...................................................................... 3-10
Fig. 3.1.18 Structure of Timer 34 mode register ...................................................................... 3-10
Fig. 3.1.19 Structure of Timer mode register 2 ........................................................................ 3-11
Fig. 3.1.20 Structure of CPU mode register ............................................................................. 3-11
Fig. 3.1.21 Structure of Interrupt request register 1 ................................................................ 3-12
Fig. 3.1.22 Structure of Interrupt request register 2 ................................................................ 3-12
Fig. 3.1.23 Structure of Interrupt control register 1 ................................................................. 3-13
Fig. 3.1.24 Structure of Interrupt control register 2 ................................................................. 3-13
Fig. 3.6.1 SFR memory map ........................................................................................................ 3-69
Fig. 3.7.1 Pin configuration of 7470 group .................................................................................3-70
Fig. 3.7.2 Pin configuration of 7471 group .................................................................................3-71
Fig. 3.7.3 Pin configuration of 7477 group .................................................................................3-72
Fig. 3.7.4 Pin configuration of 7478 group .................................................................................3-73