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22
7470/7471 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
KEY ON WAKE UP
“Key on wake up” is one way of returning from a power down state
caused by the STP or WIT instruction. If any terminal of port P0
has “L” level applied, after bit 5 of the edge polarity selection regis-
ter (EG
5
) is set to “1”, an interrupt is generated and the
microcomputer is returned to the normal operating state. A key
matrix can be connected to port P0 and the microcomputer can be
returned to a normal state by pushing any key.
The key on wake up interrupt is common with the INT
1
interrupt.
When EG
5
is set to “1”, the key on wake up function is selected.
However, key on wake up cannot be used in the normal operating
state. When the microcomputer is in the normal operating state,
both key on wake up and INT
1
are invalid.
Fig. 13 Block diagram of interrupt input and key on wake up circuit
P3
3
/CNTR
1
P3
2
/CNTR
0
P3
0
/INT
0
P3
1
/INT
1
P0
7
P0
1
EG
3
EG
2
Port P3
3
data read circuit
CNTR interrupt request signal
Port P3
2
data read circuit
EG
0
Port P3
0
data read circuit
INT
0
interrupt request signal
Port P3
1
data read circuit
INT
1
interrupt request signal
CPU halt state signal
Port P0 data read circuit
EG
1
EG
5
P0
0
Pull-up control
register
Direction register
Pull-up control
register
Direction register
Pull-up control
register
Direction register
eliNoise
circuit
1/2
1/2
X
CIN
(P5
0
)
X
IN
CM
7
EG
4
eliNoise
circuit
( Select gate: At reset, shaded side is connected.)
Note :
The 7470 group does not have X
CIN
input.
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