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12
7470/7471 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. 5 Interrupt control
Fig. 4 Structure of registers related to interrupt
b7
b0
Edge polarity selection register (EG)
(Address 00D4
16
)
INT
0
edge selection bit
INT
1
edge selection bit
CNTR
0
edge selection bit
CNTR
1
edge selection bit
0 : Falling edge
1 : Rising edge
CNTR
0
/CNTR
1
interrupt selection bit
0 : CNTR
0
1 : CNTR
1
INT
1
source selection bit (at power-down state)
0 : P3
1
/INT
1
1 : P0
0
–P0
7
“L” level (for key-on wake-up)
Nothing is allocated (The value is undefined at reading)
b7
b0
Interrupt request register 1
(Address 00FC
16
)
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
Timer 4 interrupt request bit
Nothing is allocated
(The value is undefined at reading)
Serial I/O transmit interrupt request bit
A-D conversion completion interrupt request bit
b7
b0
Interrupt control register 1
(Address 00FE
16
)
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
Timer 4 interrupt enable bit
Nothing is allocated
(The value is undefined at reading)
Serial I/O receive interrupt enable bit
A-D conversion completion interrupt enable bit
b7
b0
Interrupt request register 2
(Address 00FD
16
)
INT
0
interrupt request bit
INT
1
interrupt request bit
CNTR
0
or CNTR
1
interrupt request bit
0 : No interrupt request
1 : Interrupt requested
Nothing is allocated
(The value is undefined at reading)
b7
b0
Interrupt control register 2
(Address 00FF
16
)
INT
0
interrupt enable bit
INT
1
interrupt enable bit
CNTR
0
or CNTR
1
interrupt enable bit
0 : Interrupt disable
1 : Interrupt enabled
Nothing is allocated
(The value is undefined at reading)
Interrupt request bit
Interrupt enable bit
Interrupt disable flag I
BRK instruction
Reset
Interrupt request
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