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參數(shù)資料
| 型號： | M372F3200DJ3-C |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32M x 72 DRAM DIMM with ECC Using 16Mx4, 4K & 8K Refresh, 3.3V |
| 中文描述： | 32M × 72配置，帶ECC DRAM的內(nèi)存使用16Mx4，4K的 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 331K |
| 代理商： | M372F3200DJ3-C |
DRAM MODULE
M372F320(8)0DJ3-C
REV. 0.1 Oct. 2000
AC CHARACTERISTICS
(0
°
C
≤
T
A
≤
70
°
C, V
CC
=3.3V
±
0.3V. See notes 1,2.)
Parameter
Symbol
-50
-60
Unit
Note
Min
45
47
10
8
3
Max
Min
53
58
10
8
3
Max
Column address to W delay time
CAS precharge time to W delay time
CAS setup time(CAS-before-RAS refresh)
CAS hold time(CAS-before-RAS refresh)
RAS to CAS precharge time
Access time from CAS precharge
Hyper page cycle time
Hyper page read-modify-write cycle time
CAS precharge time(Hyper page cycle)
RAS pulse width (Hyper page cycle)
RAS hold time from CAS precharge
W to RAS precharge time(C-B-R refresh)
W to RAS hold time(C-B-R refresh)
OE access time
OE to data delay
Output buffer turn off delay time from OE
OE command hold time
Output data hold time(C-B-R refresh)
Output buffer turn off delay time from RAS
Output buffer turn off delay time from W
W to data delay
OE to CAS hold time
CAS hold time to OE
OE precharge time
W pulse width (Hyper page cycle)
t
AWD
t
CPWD
t
CSR
t
CHR
t
RPC
t
CPA
t
HPC
t
HPRWC
t
CP
t
RASP
t
RHCP
t
WRP
t
WRH
t
OEA
t
OED
t
OEZ
t
OEH
t
DOH
t
REZ
t
WEZ
t
WED
t
OCH
t
CHO
t
OEP
t
WPE
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
7
13
13
13
3,13
12
12
33
40
20
70
8
50
35
15
8
25
77
10
60
40
15
8
200K
200K
13
13
13
13
13
13
18
20
15
8
5
10
3
8
20
5
5
5
5
18
8
5
10
3
8
20
5
5
5
5
18
18
13
6,11
6,13
13
13
18
13
18
PDE to Valid PD bit
PDE to PD bit Inactive
t
PD
t
PDOFF
10
7
10
7
ns
ns
2
2
Present Detect Read Cycle
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參數(shù)描述 |
|---|---|
| M372F3280DJ3-C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:32M x 72 DRAM DIMM with ECC Using 16Mx4, 4K & 8K Refresh, 3.3V |
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