參數(shù)資料
型號(hào): M37273MF-251SP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù): 101/130頁
文件大?。?/td> 1663K
代理商: M37273MF-251SP
100
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37273MFH–XXXSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
13. A-D CONVERTER CHARACTERISTICS
(V
CC
= 5 V ± 10 %, V
SS
= 0 V, f(X
IN
) = 8 MHz, T
a
= –10 °C to 70 °C, unless otherwise noted)
Resolution
Non-linearity error
Differencial non-linearity error
Zero transition error
Full-scale transition error
Max.
6
±1
±0.9
2
–2
bits
LSB
LSB
LSB
LSB
Min.
Limits
Typ.
Unit
Test conditions
Parameter
Symbol
V
0T
V
FST
I
OL
(SUM) = 0 mA
14. MULTI-MASTER I
2
C-BUS BUS LINE CHARACTERISTICS
Bus free time
Hold time for START condition
LOW period of SCL clock
Rising time of both SCL and SDA signals
Data hold time
HIGH period of SCL clock
Falling time of both SCL and SDA signals
Data set-up time
Set-up time for repeated START condition
Set-up time for STOP condition
t
BUF
t
HD; STA
t
LOW
t
R
t
HD; DAT
t
HIGH
t
F
t
SU; DAT
t
SU; STA
t
SU; STO
Max.
1000
300
Min.
1.3
0.6
1.3
20+0.1C
b
0
0.6
20+0.1C
b
100
0.6
0.6
Max.
300
0.9
300
μ
s
μ
s
μ
s
ns
μ
s
μ
s
ns
ns
μ
s
μ
s
Unit
Standard clock mode High-speed clock mode
Min.
4.7
4.0
4.7
Parameter
Symbol
Note:
C
b
= total capacitance of 1 bus line
Fig.14.1 Definition Diagram of Timing on Multi-master I
2
C-BUS
0
4.0
250
4.7
4.0
SDA
SCL
P
t
B
U
F
S
t
HD
;
STA
t
L
O
W
t
R
t
HD
;
DAT
t
HIGH
t
F
t
SU
;
DAT
t
SU
;
STA
S
r
P
t
S
U
;
S
T
O
t
HD
;
STA
S
S
P
r
:
:
:
S
R
S
t
e
t
o
a
r
t
t
a
c
r
c
o
t
o
n
c
n
d
o
d
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i
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