參數(shù)資料
型號： M37273EF8SP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述： 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁數(shù)： 48/138頁
文件大?。?/td> 1327K
代理商： M37273EF8SP
48
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37273M8–XXXSP, M37273MF–XXXSP
M37273E8SP, M37273EFSP
MITSUBISHI MICROCOMPUTERS
Rev. 1.0
Fig. 8.9.2 ROM Correction Enable Register
Fig. 8.9.1 ROM Correction Address Registers
8.9 ROM CORRECTION FUNCTION
This can correct program data in ROM. Up to 2 addresses can be
corrected, a program for correction is stored in the ROM correction
vector in RAM as the top address. The ROM correction vectors are 2
vectors.
Vector 1 : address 0300
16
Vector 2 : address 0320
16
Set the address of the ROM data to be corrected into the ROM cor-
rection address register. When the value of the counter matches the
ROM data address in the ROM correction vector as the top address,
the main program branches to the correction program stored in the
ROM memory for correction. To return from the correction program
to the main program, the op code and operand of the JMP instruction
(total of 3 bytes) are necessary at the end of the correction program.
The ROM correction function is controlled by the ROM correction
enable register.
Notes 1:
Specify the first address (op code address) of each
instruction as the ROM correction address.
2:
Use the JMP instruction (total of 3 bytes) to return from
the correction program to the main program.
3:
Do not set the same ROM correction address to vectors 1
and 2.
020A
16
ROM correction address 1 (high-order)
020B
16
ROM correction address 1 (low-order)
020C
16
ROM correction address 2 (high-order)
020D
16
ROM correction address 2 (low-order)
b7 b6 b5 b4 b3 b2 b1 b0
ROM correction enable register (RCR) [Address 020E
16
]
B
After reset
R W
ROM Correction Enable Register
0
Vector 1 enable bit (RC0)
Name
Functions
0: Disabled
1: Enabled
1
Vector 2 enable bit (RC1)
0: Disabled
1: Enabled
2
to
7
these bits are read out, the values are “0.”
0
0
0
R W
R W
R —
相關(guān)PDF資料
PDF描述
M37273E8SP Single Chip 8 Bits Microcomputer(8位單片機(jī))
M37273EFSP Single Chip 8 Bits Microcomputer(8位單片機(jī))
M37273M8 Single Chip 8 Bits Microcomputer(8位單片機(jī))
M37273MF Single Chip 8 Bits Microcomputer(8位單片機(jī))
M372F3200DJ3-C 32M x 72 DRAM DIMM with ECC Using 16Mx4, 4K & 8K Refresh, 3.3V
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