參數(shù)資料
型號: M37225MC-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDIP42
封裝: 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁數(shù): 44/128頁
文件大?。?/td> 1481K
代理商: M37225MC-XXXSP
M37225M6/M8/MA/MC-XXXSP, M37225ECSP
Rev.1.00
Nov 01, 2000
page 20 of 124
REJ03B0136-0100Z
(4) Serial I/O Interrupt
This is an interrupt request from the clock synchronous serial I/O
function.
(5) f(XIN)/4096 Interrupt
The f (XIN)/4096 interrupt occurs regularly with a f(XIN)/4096 pe-
riod. Set bit 0 of the PWM mode register 1 to “0.”
(6) Multi-master I2C-BUS Interface Interrupt
This is an interrupt request related to the multi-master I2C-BUS
interface.
(7) A-D Conversion Interrupt
The A-D conversion interrupt occurs at the completion of A-D
conversion.
(8) BRK Instruction Interrupt
This software interrupt has the least significant priority. It does
not have a corresponding interrupt enable bit, and it is not af-
fected by the interrupt disable flag I (non-maskable).
Fig. 8.3.1 Interrupt Control
Interrupt request bit
Interrupt enable bit
Interrupt disable flag I
BRK instruction
Reset
Interrupt
request
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