參數(shù)資料
型號(hào): M37151
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
中文描述: 單芯片8位CMOS微機(jī)隱蔽字幕解碼器和屏幕顯示控制器
文件頁(yè)數(shù): 94/139頁(yè)
文件大?。?/td> 1491K
代理商: M37151
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP
93
Rev 1.0
8.14 CLOCK GENERATING CIRCUIT
This microcomputer has 2 built-in oscillation circuits. An oscillation
circuit can be formed by connecting a resonator between X
IN
and
X
OUT
(X
CIN
and X
COUT
). Use the circuit constants in accordance with
the resonator manufacturer’s recommended values. No external re-
sistor is needed between X
IN
and X
OUT
since a feed-back resistor
exists on-chip. However, an external feed-back resistor is needed
between X
CIN
and X
COUT
. When using X
CIN
-X
COUT
as sub-clock,
clear bits 5 and 6 of the OSD control register to “0.” To supply a clock
signal externally, input it to the X
IN
(X
CIN
) pin and make the X
OUT
(X
COUT
) pin open. When not using X
CIN
clock, connect the X
CIN
to
V
SS
and make the X
COUT
pin open.
The OSD clock can be chosen to be the data slicer clock (approx. 26
MHz) that is output from the data slicer.
After reset has completed, the internal clock
φ
is half the frequency of
X
IN
. Immediately after poweron, both the X
IN
and X
CIN
clock start
oscillating. To set the internal clock
φ
to low-speed operation mode,
set bit 7 of the CPU mode register to “1.”
8.14.1 OSCILLATION CONTROL
(1) Stop Mode
The built-in clock generating circuit is shown in Figure 120. When the
STP instruction is executed, the internal clock f stops at HIGH. At the
same time, timers 3 and 4 are connected by hardware and “FF
16
” is
set in timer 3 and “07
16
” is set in timer 4. Select f(X
IN
)/16 or f(X
CIN
)/
16 as the timer 3 count source (set both bit 0 of timer mode register
2 and bit 6 at address 00C7
16
to “0” before the execution of the STP
instruction). Moreover, set the timer 3 and timer 4 interrupt enable
bits to disabled (“0”) before execution of the STP instruction. The
oscillator restarts when an external interrupt is accepted. However,
the internal clock f keeps its HIGH level until timer 4 overflows, allow-
ing time for oscillation stabilization when a ceramic resonator or a
quartz-crystal oscillator is used.
By settimg bit 7 of timer return setting register (address 00CC
16
) to
“1, ” an arbitrarary value can be set to timer 3 and timer 4.
Bit 7 of clock control register 3 (address 0202
16
) can switch Port P
10
pin and the CLK
CONT
. When CLK
CONT
pin is selected,
“H” is output
normally. When an extenal interrupt is recieved in the STP state, the
CLK
CONT
pin goes back to “H” output.
(2) Wait Mode
When the WIT instruction is executed, the internal clock
φ
stops in
the HIGH level but the oscillator continues running. This wait state is
released at reset or when an interrupt is accepted (See note). Since
the oscillator does not stop, the next instruction can be executed
immediately.
Note:
In the wait mode, the following interrupts are invalid.
V
SYNC
interrupt
OSD interrupt
All timer interrupts using external clock input from port pin as count
source
All timer interrupts using f(X
IN
)/2 or f(X
CIN
)/2 as count source
All timer interrupts using f(X
IN
)/4096 or f(X
CIN
)/4096 as count source
f(X
IN
)/4096 interrupt
Multi-master I
2
C-BUS interface interrupt
Data slicer interrupt
A-D conversion interrupt
(3) Low-speed Mode
If the internal clock is generated from the sub-clock (X
CIN
), a low
power consumption operation can be realized by stopping only the
main clock X
IN
. To stop the main clock, set bit 6 (CM6) of the CPU
mode register (00FB
16
) to “1.” When the main clock X
IN
is restarted,
the program must allow enough time for oscillation to stabilize.
Note that in the low-power-consumption mode the X
CIN
-X
COUT
drivability can be reduced, allowing even lower power consumption.
To reduce the X
CIN
-X
COUT
drivability, clear bit 5 (CM5) of the CPU
mode register (00FB
16
) to “0.” At reset, this bit is set to “1” and strong
drivability is selected to help the oscillation to start. When executing
an STP instruction, set this bit to “1” by software before initiating the
instruction.
Fig.8.14.1 Ceramic Resonator Circuit Example
Fig.8.14.2 External Clock Input Circuit Example
X
C
I
N
X
I
N
C
CIN
Microcomputer
X
C
O
U
T
R
f
R
d
C
COUT
X
O
U
T
C
IN
C
OUT
C1
0.01μF
FILT
X
CIN
Microcomputer
External oscillation
circuit or external
pulse
X
COUT
X
IN
X
OUT
Open
Open
External oscillation
circuit
V
V
c
s
c
s
V
V
c
s
c
s
相關(guān)PDF資料
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