參數(shù)資料
型號(hào): M36P0R9070E0ZACF
廠商: 意法半導(dǎo)體
英文描述: 512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash Memory 128 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
中文描述: 512兆位(x16插槽,多銀行,多層次,多突發(fā))128兆位閃存(突發(fā))移動(dòng)存儲(chǔ)芯片,1.8V電源,多芯片封裝
文件頁(yè)數(shù): 1/26頁(yè)
文件大小: 200K
代理商: M36P0R9070E0ZACF
PRELIMINARY DATA
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
Rev. 1
1/26
November 2005
1
M36P0R9070E0
512 Mbit (x16, Multiple Bank, Multi-Level, Burst) Flash Memory
128 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
Features summary
Multi-chip package
– 1die of 512 Mbit (32Mb x 16, Multiple Bank,
Multi-Level, Burst) Flash Memory
– 1
die of 128Mbit (8Mb x16)
PSRAM
Supply voltage
– V
DDF
= V
CCP
= V
DDQ
= 1.7 to 1.95V
– V
PPF
= 9V for fast program (12V tolerant)
Electronic signature
– Manufacturer Code: 20h
– Device Code: 8819
Package
– ECOPACK
Flash memory
Synchronous / asynchronous read
– Synchronous Burst Read mode:
108MHz, 66MHz
– Asynchronous Page Read mode
– Random Access: 93ns
Programming time
– 4μs typical Word program time using Buffer
Enhanced Factory Program command
Memory organization
– Multiple Bank Memory Array: 64 Mbit
Banks
– Four Extended Flash Array (EFA) Blocks of
64 Kbits
Dual operations
– program/erase in one Bank while read in
others
– No delay between read and write
operations
Security
– 2112-bit user programmable OTP Cells
– 64-bit unique device number
100,000 program/erase cycles per block
Block locking
– All Blocks locked at power-up
– Any combination of Blocks can be locked
with zero latency
– WP
F
for Block Lock-Down
– Absolute Write Protection with V
PPF
= V
SS
Common Flash Interface (CFI)
PSRAM
Access time: 70ns
Asynchronous Page Read
– Page Size: 4, 8 or 16 Words
– Subsequent read within page: 20ns
Low power features
– Partial Array Self Refresh (PASR)
– Deep Power-Down mode (DPD)
Synchronous Burst Read/Write
TFBGA107 (ZAC)
FBGA
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