參數(shù)資料
型號(hào): M36LLR8760M
廠商: 意法半導(dǎo)體
英文描述: 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
中文描述: 256 128兆位(多銀行,多層次,突發(fā))64兆位閃存(突發(fā))移動(dòng)存儲(chǔ)芯片,1.8V電源,多芯片封裝
文件頁(yè)數(shù): 1/19頁(yè)
文件大小: 427K
代理商: M36LLR8760M
1/19
TARGET SPECIFICATION
July 2005
This is preliminary information on a new product forseen to be developed. Details are subject to change without notice.
M36LLR8760T1, M36LLR8760D1
M36LLR8760M1, M36LLR8760B1
256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory
64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
FEATURES SUMMARY
MULTI-CHIP PACKAGE
1 die of 256 Mbit (16Mb x16, Multiple
Bank, Multi-level, Burst) Flash Memory
1 die of 128 Mbit (8Mb x16, Multiple Bank,
Multi-Level, Burst) Flash Memory
1 die of 64 Mbit (4Mb x16) Pseudo SRAM
SUPPLY VOLTAGE
V
DDF1
= V
DDF2
= V
CCP
= V
DDQF
= 1.7 to
1.95V
V
PPF
= 9V for fast program (12V tolerant)
ELECTRONIC SIGNATURE
Manufacturer Code: 20h
Top Configuration (Top + Top)
M36LLR8760T1: 880Dh + 88C4h
Mixed Configuration (Bottom + Top)
M36LLR8760D1: 880Eh + 88C4h
Mixed Configuration (Top + Bottom)
M36LLR8760M1: 880Dh + 88C5h
Bottom Configuration (Bottom + Bottom)
M36LLR8760B1: 880Eh + 88C5h
PACKAGE
Compliant with Lead-Free Soldering
Processes
Lead-Free Versions
FLASH MEMORIES
SYNCHRONOUS / ASYNCHRONOUS READ
Synchronous Burst Read mode: 54MHz
Asynchronous Page Read mode
Random Access: 85ns
SYNCHRONOUS BURST READ SUSPEND
PROGRAMMING TIME
10μs typical Word program time using
Buffer Enhanced Factory Program
command
MEMORY ORGANIZATION
Multiple Bank Memory Array:
16 Mbit Banks for the 256 Mbit Memory
8 Mbit Banks for the 128 Mbit Memory
Parameter Blocks (at Top or Bottom)
Figure 1. Package
COMMON FLASH INTERFACE (CFI)
100,000 PROGRAM/ERASE CYCLES per
BLOCK
DUAL OPERATIONS
program/erase in one Bank while read in
others
No delay between read and write
operations
SECURITY
64 bit unique device number
2112 bit user programmable OTP Cells
BLOCK LOCKING
All blocks locked at power-up
Any combination of blocks can be locked
with zero latency
WP
F
for Block Lock-Down
Absolute Write Protection with V
PPF
= V
SS
PSRAM
ACCESS TIME: 70ns
ASYNCHRONOUS PAGE READ
Page Size: 16 words
Subsequent read within page: 20ns
LOW POWER FEATURES
Temperature Compensated Refresh
(TCR)
Partial Array Refresh (PAR)
Deep Power-Down (DPD) Mode
SYNCHRONOUS BURST READ/WRITE
LFBGA88 (ZAQ)
8 x 10mm
FBGA
相關(guān)PDF資料
PDF描述
M36LLR8760M1 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR8760T 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR8760T1 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR8760TT 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR8760D 256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M36LLR8760M1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR8760T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR8760T1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR8760TT 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package
M36LLR876B0 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256 + 128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package