- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383296 > M36L0R7060U1 (意法半導(dǎo)體) 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package PDF資料下載
參數(shù)資料
| 型號： | M36L0R7060U1 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
| 中文描述： | 128兆位（復(fù)用的I / O，多銀行，多層次，多突發(fā)）快閃記憶體，32或64兆移動存儲芯片，1.8V電源多芯片封裝 |
| 文件頁數(shù)： | 15/22頁 |
| 文件大?。?/td> | 118K |
| 代理商： | M36L0R7060U1 |
M36L0R7060U1, M36L0R7060L1, M36L0R7050U1, M36L0R7050L1
Functional description
15/22
Operating modes - Standard Asynchronous operation
Table 2.
Operation
(1)
(2)
E
F
G
F
W
F
RP
F
WAIT
(3)
L E
P
W
P
G
P
UB
P
LB
P
CR
P
A19 A18
Other
Address
Inputs
ADQ0-
ADQ7
ADQ8-
ADQ15
F
Bus Read
V
IL
V
IL
V
IH
V
IH
V
IL
V
IH
V
IL
V
IH
V
IH
V
IH
V
IL
The PSRAM must be disabled.
Data Output
Bus Write
Data Input
Address Latch V
IL
V
IH
Output
Disable
X
V
IH
Address Input
V
IL
V
IH
V
IH
V
IH
V
IH
Any PSRAM mode is allowed.
Hi-Z
Standby
V
IH
X
X
X
V
IH
V
IL
Hi-Z
X
Hi-Z
Reset
X
X
Hi-Z
X
Hi-Z
P
Word Read
The Flash memory must
be disabled.
\_/
V
IL
V
IH
V
IL
V
IL
V
IL
V
IL
Address In Valid
Address In/ Data
Out Valid
Word Write
V
IL
V
IH
V
IL
V
IL
V
IL
Address In Valid
Address In/ Data In
Valid
Read
Configuration
Register (CR
controlled
method)
(4)
V
IH
V
IL
V
IL
V
IL
V
IH
00(RCR)
10(BCR)
X1(DIDR)
X
Address In/ BCR,
RCR or DIDR
Content Valid
Program
Configuration
Register (CR
Controlled)
(5)
V
IL
V
IL
V
IH
X
X
0 or 00
(RCR)
1 or 10
(BCR)
(6)
BCR/
RCR
Data
Address In Valid
Output
Disable/No
Operation
Any Flash memory
mode is allowed.
X
V
IH
X
X
X
V
IL
X
X
X
High-Z
Deep Power-
Down
(7)
V
IH
X
X
X
X
X
X
X
X
High-Z
Standby
V
IH
X
X
X
X
X
V
IL
X
X
High-Z
1.
2.
3.
4.
The Clock signal, K, must remain Low when the PSRAM is operating in asynchronous mode.
X = Don’t Care
In the Flash memory the WAIT signal polarity is configured using the Set Configuration Register command.
Operating mode available in the M36L0R7060U1 and M36L0R7060L1 only (see M69KM096AA datasheet).
5.
6.
BCR and RCR only.
In the PSRAM of the M36L0R7050U1 and M36L0R7050L1, A19 is used to select between the BCR and the RCR whereas
in the PSRAM of the M36L0R7060U1 and M36L0R7060L1 both A18 and A19 are used to select the BCR, the RCR or the
DIDR.
The device enters Deep Power-Down mode by driving the Chip Enable signal, E, from Low to High, with bit 4 of the RCR
set to ‘0’. The device remains in Deep Power-Down mode until E goes Low again and is held Low for t
ELEH(DP)
.
7.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M36L0R7060U1ZAME | 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
| M37220M3-010SP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER |
| M37220M3 | Single Chip 8 Bits Microcomputer(8位單片機) |
| M37220M3-155SP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER |
| M37220M3-157SP | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M36L0R7060U1ZAME | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
| M36L0R7060U1ZAMF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
| M36L0R7060U3ZAME | 制造商:Micron Technology Inc 功能描述:WIRELESS - Trays |
| M36L0R7060U3ZAMF | 制造商:Micron Technology Inc 功能描述:WIRELESS - Tape and Reel |
| M36L0R7060U3ZSE | 制造商:Micron Technology Inc 功能描述:WIRELESS - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH PSRAM 192M |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。