- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383295 > M36L0R7050U1ZAMF (意法半導體) 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package PDF資料下載
參數(shù)資料
| 型號： | M36L0R7050U1ZAMF |
| 廠商： | 意法半導體 |
| 英文描述： | 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
| 中文描述： | 128兆位（復用的I / O，多銀行，多層次，多突發(fā)）快閃記憶體，32或64兆移動存儲芯片，1.8V電源多芯片封裝 |
| 文件頁數(shù)： | 11/22頁 |
| 文件大?。?/td> | 118K |
| 代理商： | M36L0R7050U1ZAMF |
M36L0R7060U1, M36L0R7060L1, M36L0R7050U1, M36L0R7050L1
Signal descriptions
11/22
2.6
Flash memory Chip Enable (E
F
)
The Chip Enable input activates the memory control logic, input buffers, decoders and
sense amplifiers. When Chip Enable is at V
IL
and
Reset is at V
IH
the device is in active
mode. When Chip Enable is at V
IH
the memory is deselected, the outputs are high
impedance and the power consumption is reduced to the stand-by level.
It is not allowed to set both E
F
and E
P
to V
IL
at the same time.
2.7
Flash memory Output Enable (G
F
)
The Output Enable input controls data outputs during the Bus Read operation of the Flash
memory.
2.8
Flash memory Write Enable (W
F
)
The Write Enable input controls the Bus Write operation of the Flash memory’s Command
Interface. The data and address inputs are latched on the rising edge of Chip Enable or
Write Enable whichever occurs first.
2.9
Flash memory Write Protect (WP
F
)
Write Protect is an input that gives an additional hardware protection for each block. When
Write Protect is at V
IL
, the Lock-Down is enabled and the protection status of the Locked-
Down blocks cannot be changed. When Write Protect is at V
IH
, the Lock-Down is disabled
and the Locked-Down blocks can be locked or unlocked. (refer to M58LRxxxGUL
datasheet).
2.10
Flash memory Reset (RP
F
)
The Reset input provides a hardware reset of the memory. When Reset is at V
IL
, the
memory is in reset mode: the outputs are high impedance and the current consumption is
reduced to the Reset Supply Current I
DD2
. Refer to the M58LRxxxGUL datasheet for the
value of I
DD2.
After Reset all blocks are in the Locked state and the Configuration Register is
reset. When Reset is at V
IH
, the device is in normal operation. Exiting reset mode the device
enters asynchronous read mode, but a negative transition of Chip Enable or Latch Enable is
required to ensure valid data outputs.
The Reset pin can be interfaced with 3V logic without any additional circuitry. It can be tied
to V
RPH
(refer to the M58LRxxxGUL datasheet).
2.11
PSRAM Chip Enable (E
P
)
Chip Enable, E
P
, activates the device when driven Low (asserted). When de-asserted (V
IH
),
the device is disabled and goes automatically in low-power Standby mode or Deep Power-
Down mode, according to the RCR settings.
It is not allowed to set both E
F
and E
P
to V
IL
at the same time.
相關PDF資料 |
PDF描述 |
|---|---|
| M36L0R7060L1 | 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
| M36L0R7060L1ZAME | 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
| M36L0R7060L1ZAMF | 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
| M36L0R7060U1 | 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
| M36L0R7060U1ZAME | 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M36L0R7050U3ZSE | 制造商:Micron Technology Inc 功能描述:WIRELESS - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH PSRAM 160M |
| M36L0R7050U3ZSF | 制造商:Micron Technology Inc 功能描述:WIRELESS - Tape and Reel 制造商:Micron Technology Inc 功能描述:FLASH |
| M36L0R7050U3ZSF TR | 制造商:Micron Technology Inc 功能描述:IC FLASH PSRAM 160M |
| M36L0R7060B1 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory and 64 Mbit (Burst) PSRAM, 1.8 V supply, multichip package |
| M36L0R7060B1ZAQE | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:128 Mbit (Multiple Bank, Multilevel, Burst) Flash memory and 64 Mbit (Burst) PSRAM, 1.8 V supply, multichip package |
發(fā)布緊急采購，3分鐘左右您將得到回復。