參數(shù)資料
型號(hào)： M36L0R7050L1ZAMF
廠商： 意法半導(dǎo)體
英文描述： 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package
中文描述： 128兆位（復(fù)用的I / O，多銀行，多層次，多突發(fā)）快閃記憶體，32或64兆移動(dòng)存儲(chǔ)芯片，1.8V電源多芯片封裝
文件頁(yè)數(shù)： 12/22頁(yè)
文件大?。?/td> 118K
代理商： M36L0R7050L1ZAMF
Signal descriptions
M36L0R7060U1, M36L0R7060L1, M36L0R7050U1, M36L0R7050L1
12/22
2.12
PSRAM Output Enable (G
P
)
When held Low, V
IL
, the Output Enable, G
P
, enables the Bus Read operations of the
memory.
2.13
PSRAM Write Enable (W
P
)
Write Enable, W
P
, controls the Bus Write operation of the memory. When asserted (V
IL
), the
device is in write mode and write operations can be performed either to the configuration
registers or to the memory array.
2.14
PSRAM Upper Byte Enable (UB
P
)
The Upper Byte Enable, UB
P
, gates the data on the Upper Byte of the Address Inputs/ Data
Inputs/Outputs (ADQ8-ADQ15) to or from the upper part of the selected address during a
write or read operation.
2.15
PSRAM Lower Byte Enable (LB
P
)
The Lower Byte Enable, LB
P
, gates the data on the Lower Byte of the Address Inputs/Data
Input/Outputs (ADQ0-ADQ7) to or from the lower part of the selected address during a write
or read operation.
If both LB
P
and UB
P
are disabled (High), the device will disable the data bus from receiving
or transmitting data. Although the device will seem to be deselected, it remains in an active
mode as long as E
P
remains Low.
2.16
PSRAM Configuration Register Enable (CR
P
)
When this signal is driven High, V
IH
, bus read or write operations access either the value of
the Refresh Configuration Register (RCR) or the Bus Configuration Register (BCR)
according to the value of A19.
2.17
V
DDF
Flash memory Supply Voltage
V
DDF
provides the power supply to the internal core of the Flash memory. It is the main
power supply for all Flash memory operations (Read, Program and Erase).
2.18
V
CCP
PSRAM Supply Voltage
The V
CCP
Supply Voltage is the core supply voltage.
相關(guān)PDF資料
PDF描述
M36L0R7050U1 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package
M36L0R7050U1ZAME 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package
M36L0R7050U1ZAMF 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package
M36L0R7060L1 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package
M36L0R7060L1ZAME 128 Mbit (Mux I/O, Multiple Bank, Multi-Level, Burst) Flash memory, 32 or 64 Mbit PSRAM, 1.8V supply Multi-Chip Package
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M36L0R7050L3ZSE 制造商:Micron Technology Inc 功能描述:WIRELESS - Trays 制造商:Micron Technology Inc 功能描述:IC FLASH PSRAM 160M
M36L0R7050L3ZSF 制造商:Micron Technology Inc 功能描述:WIRELESS - Tape and Reel
M36L0R7050L3ZSF TR 制造商:Micron Technology Inc 功能描述:IC FLASH PSRAM 160M
M36L0R7050T0 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32 Mbit (2M x16) PSRAM, 1.8V Supply Multi-Chip Package
M36L0R7050T0ZAQ 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 32 Mbit (2M x16) PSRAM, 1.8V Supply Multi-Chip Package
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