參數(shù)資料
型號(hào): M368L6423ETM-CC5
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 184pin Unbuffered Module based on 256Mb E-die 64/72-bit ECC/Non ECC
中文描述: 184pin緩沖模塊,基于256Mb電子模具64/72-bit ECC的/非ECC
文件頁(yè)數(shù): 16/19頁(yè)
文件大?。?/td> 287K
代理商: M368L6423ETM-CC5
DDR SDRAM
Revision 1.0 December, 2003
256MB, 512MB DDR466 Unbuffered DIMM
j. Table 3 is used to increase tDS and tDH in the case where the I/O slew rate is below 0.5 V/ns. The I/O slew rate is based on the lesser
on the lesser of the AC - AC slew rate and the DC- DC slew rate. The inut slew rate is based on the lesser of the slew rates deter
mined by either VIH(ac) to VIL(ac) or VIH(DC) to VIL(DC), and similarly for rising transitions.
k. DQS, DM, and DQ input slew rate is specified to prevent double clocking of data and preserve setup and hold times. Signal transi
tions through the DC region must be monotony.
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M368L6423FTN 184pin Unbuffered Module based on 256Mb F-die with 64/72-bit Non-ECC / ECC
M368L6423FTN-CB3B0 184pin Unbuffered Module based on 256Mb F-die with 64/72-bit Non-ECC / ECC
M368L6423DTM-CCC 184pin Unbuffered Module based on 256Mb D-die 64/72-bit Non ECC/ECC
M368L6423DTM-LCC 184pin Unbuffered Module based on 256Mb D-die 64/72-bit Non ECC/ECC
M368L6423ETM DDR SDRAM Unbuffered Module
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