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參數(shù)資料
| 型號(hào)： | M368L1624DTL-C(L)B3 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 16Mx64 DDR SDRAM 184pin DIMM based on 16Mx16 |
| 中文描述： | 16Mx64 DDR SDRAM的184Pin DIMM插槽基礎(chǔ)上16Mx16顯示 |
| 文件頁(yè)數(shù)： | 3/22頁(yè) |
| 文件大?。?/td> | 354K |
| 代理商： | M368L1624DTL-C(L)B3 |
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DDR SDRAM
Rev. 1.2 May. 2003
128MB, 256MB, 512MB Unbuffered DIMM
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Ordering Information
Operating Frequencies
Part Number
Density
128MB
256MB
512MB
256MB
512MB
Organization
16M x 64
32M x 64
64M x 64
32M x 72
64M x 72
Component Composition
16Mx16( K4H561638D) * 4EA
32Mx8( K4H560838D) * 8EA
32Mx8( K4H560838D) * 16EA
32Mx8( K4H560838D) * 9EA
32Mx8( K4H560838D) * 18EA
Height
1,250(mil)
1,250(mil)
1,250(mil)
1,250(mil)
1,250(mil)
M368L1624DTM-C(L)CC/C4
M368L3223DTM-C(L)CC/C4
M368L6423DTM-C(L)CC/C4
M381L3223DTM-C(L)CC/C4
M381L6423DTM-C(L)CC/C4
CC(DDR400@CL=3)
200MHz
3-3-3
C4(DDR400@CL=3)
200MHz
3-4-4
Speed @CL3
CL-tRCD-tRP
Feature
Power supply : Vdd: 2.6V
±
0.1V, Vddq: 2.6V
±
0.1V
Double-data-rate architecture; two data transfers per clock cycle
Bidirectional data strobe(DQS)
Differential clock inputs(CK and CK)
DLL aligns DQ and DQS transition with CK transition
Programmable Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333
Programmable Burst length (2, 4, 8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh)
Serial presence detect with EEPROM
PCB : Height 1,250 (mil), single (128MB, 256MB) and double(512MB) sided
SSTL_2 Interface
184Pin Unbuffered DIMM based on 256Mb D-die (x8, x16)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M368L1624DTM-LCC | 184pin Unbuffered Module based on 256Mb D-die 64/72-bit Non ECC/ECC |
| M368L1713CTL-LA2 | 128MB DDR SDRAM MODULE (16Mx64 based on 16Mx8 DDR SDRAM) Unbuffered 184pin DIMM 64-bit Non-ECC/Parity |
| M368L1713CTL-LB0 | 128MB DDR SDRAM MODULE (16Mx64 based on 16Mx8 DDR SDRAM) Unbuffered 184pin DIMM 64-bit Non-ECC/Parity |
| M368L1713CTL-LB3 | 128MB DDR SDRAM MODULE (16Mx64 based on 16Mx8 DDR SDRAM) Unbuffered 184pin DIMM 64-bit Non-ECC/Parity |
| M368L1713CTL | 128MB DDR SDRAM MODULE (16Mx64 based on 16Mx8 DDR SDRAM) Unbuffered 184pin DIMM 64-bit Non-ECC/Parity |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M368L1624DTM | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:184pin Unbuffered Module based on 256Mb D-die 64/72-bit Non ECC/ECC |
| M368L1624DTM-CCC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:184pin Unbuffered Module based on 256Mb D-die 64/72-bit Non ECC/ECC |
| M368L1624DTM-CCC/C4 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:184pin Unbuffered Module based on 256Mb D-die 64/72-bit Non ECC/ECC |
| M368L1624DTM-LCC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:184pin Unbuffered Module based on 256Mb D-die 64/72-bit Non ECC/ECC |
| M368L1624DTM-LCC/C4 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:184pin Unbuffered Module based on 256Mb D-die 64/72-bit Non ECC/ECC |
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