參數(shù)資料
型號(hào): M34C02-WDW1TP
廠(chǎng)商: 意法半導(dǎo)體
英文描述: 2 Kbit Serial IC Bus EEPROM for DIMM serial presence detect
中文描述: 2千位串行IC總線(xiàn)的EEPROM內(nèi)存串行存在檢測(cè)
文件頁(yè)數(shù): 12/31頁(yè)
文件大?。?/td> 162K
代理商: M34C02-WDW1TP
Device operation
M34C02-W, M34C02-L, M34C02-R
12/31
3.5
Memory Addressing
To start communication between the bus master and the slave device, the bus master must
initiate a Start condition. Following this, the bus master sends the Device Select Code,
shown in
Table 2
(on Serial Data (SDA), most significant bit first).
The Device Select Code consists of a 4-bit Device Type Identifier, and a 3-bit Chip Enable
“Address” (E2, E1, E0). To address the memory array, the 4-bit Device Type Identifier is
1010b; to address the Protection Register, it is 0110b.
Up to eight memory devices can be connected on a single I
2
C bus. Each one is given a
unique 3-bit code on the Chip Enable (E0, E1, E2) inputs. When the Device Select Code is
received, the device only responds if the Chip Enable Address is the same as the value on
the Chip Enable (E0, E1, E2) inputs.
The 8
th
bit is the Read/Write bit (RW). This bit is set to 1 for Read and 0 for Write operations.
If a match occurs on the Device Select code, the corresponding device gives an
acknowledgment on Serial Data (SDA) during the 9
th
bit time. If the device does not match
the Device Select code, it deselects itself from the bus, and goes into Stand-by mode.
Table 3.
Figure 6.
Setting the Write Protection Register (WC = 0)
Operating Modes
Mode
RW bit
WC
(1)
1.
X =
V
IH
or V
IL
.
Bytes
Initial Sequence
Current Address Read
1
X
1
START, Device Select, RW = 1
Random Address
Read
0
X
1
START, Device Select, RW = 0, Address
1
X
reSTART, Device Select, RW = 1
Sequential Read
1
X
1
Similar to Current or Random Address Read
Byte Write
0
V
IL
1
START, Device Select, RW = 0
Page Write
0
V
IL
16
START, Device Select, RW = 0
S
SDA LINE
AI01935B
ACK
WORD
ADDRESS
VALUE
(DON'T CARE)
ACK
DATA
VALUE
(DON'T CARE)
S
ACK
CONTROL
BYTE
BUS ACTIVITY
MASTER
BUS ACTIVITY
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