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參數(shù)資料
| 型號： | M34C02-W |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 2 Kbit Serial IC Bus EEPROM for DIMM serial presence detect |
| 中文描述： | 2千位串行IC總線的EEPROM內(nèi)存串行存在檢測 |
| 文件頁數(shù)： | 13/31頁 |
| 文件大小： | 162K |
| 代理商： | M34C02-W |
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M34C02-W, M34C02-L, M34C02-R
Device operation
13/31
3.6
Setting the Software Write-Protection
The M34C02-W has a hardware write-protection feature, using the Write Control (WC)
signal. This signal can be driven High or Low, and must be held constant for the whole
instruction sequence. When Write Control (WC) is held Low, the whole memory array
(addresses 00h to FFh) is write protected. When Write Control (WC) is held High, the write
protection of the memory array is dependent on whether software write-protection has been
set.
Software write-protection allows the bottom half of the memory area (addresses 00h to 7Fh)
to be permanently write protected irrespective of subsequent states of the Write Control
(WC) signal.
The write protection feature is activated by writing once to the Protection Register. The
Protection Register is accessed with the device select code set to 0110b (as shown in
Table 2
), and the E2, E1 and E0 bits set according to the states being applied on the E2, E1
and E0 signals. As for any other write command, Write Control (WC) needs to be held Low.
Address and data bytes must be sent with this command, but their values are all ignored,
and are treated as Don’t Care. Once the Protection Register has been written, the write
protection of the first 128 Bytes of the memory is enabled, and it is not possible to unprotect
these 128 Bytes, even if the device is powered off and on, and regardless the state of Write
Control (WC).
When the Protection Register has been written, the M34C02-W no longer responds to the
device type identifier 0110b in either read or write mode.
Figure 7.
Result of setting the write protection
Default EEPROM memory area
state before write access
to the Protect Register
AI01936C
Standard
Array
FFh
Standard
Array
80h
7Fh
00h
Standard
Array
FFh
Write
Protected
Array
80h
7Fh
00h
State of the EEPROM memory
area after write access
to the Protect Register
Memory
Area
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