參數(shù)資料
型號(hào): M34C02-LDW6P
廠商: 意法半導(dǎo)體
英文描述: 2 Kbit Serial IC Bus EEPROM for DIMM serial presence detect
中文描述: 2千位串行IC總線(xiàn)的EEPROM內(nèi)存串行存在檢測(cè)
文件頁(yè)數(shù): 9/31頁(yè)
文件大?。?/td> 162K
代理商: M34C02-LDW6P
M34C02-W, M34C02-L, M34C02-R
Signal description
9/31
2.5
Supply voltage (V
CC
)
2.5.1
Operating supply voltage V
CC
Prior to selecting the memory and issuing instructions to it, a valid and stable V
CC
voltage
within the specified [V
CC
(min), V
CC
(max)] range must be applied (see
Table 6
,
Table 7
and
Table 8
). In order to secure a stable DC supply voltage, it is recommended to decouple the
V
CC
line with a suitable capacitor (usually of the order of 10nF to 100nF) close to the
V
CC
/V
SS
package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction
and, for a Write instruction, until the completion of the internal write cycle (t
W
).
2.5.2
Internal device reset
In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR)
circuit is included. At Power-up (continuous rise of V
CC
), the device will not respond to any
instruction until V
CC
has reached the Power On Reset threshold voltage (this threshold is
lower than the minimum V
CC
operating voltage defined in
Table 6
,
Table 7
and
Table 8
).
When V
CC
has passed the POR threshold, the device is reset and in the Standby Power
mode.
2.5.3
Power-down
At Power-down (where V
CC
decreases continuously), as soon as V
CC
drops from the normal
operating voltage to below the Power On Reset threshold voltage, the device stops
responding to any instruction sent to it.
During Power-down, the device must be deselected and in Standby Power mode (that is
there should be no internal Write cycle in progress).
Figure 4.
Maximum R
P
value versus bus parasitic capacitance (C) for an I2C Bus
AI01665b
VCC
C
SDA
R
P
MASTER
R
P
SCL
C
100
0
4
8
12
16
20
C (pF)
M
)
10
1000
fc = 400kHz
fc = 100kHz
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