參數(shù)資料
型號(hào): M34554EDFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù): 108/138頁
文件大小: 1082K
代理商: M34554EDFP
Rev.3.00
Aug 06, 2004
page 71 of 136
REJ03B0043-0300Z
4554 Group
PU03
PU02
PU01
PU00
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Port P03 pull-up transistor
control bit
Port P02 pull-up transistor
control bit
Port P01 pull-up transistor
control bit
Port P00 pull-up transistor
control bit
Pull-up control register PU0
at reset : 00002
at power down : state retained
0
1
0
1
0
1
0
1
R/W
TAPU0/
TPU0A
PU13
PU12
PU11
PU10
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Pull-up transistor OFF
Pull-up transistor ON
Port P13 pull-up transistor
control bit
Port P12 pull-up transistor
control bit
Port P11 pull-up transistor
control bit
Port P10 pull-up transistor
control bit
Pull-up control register PU1
at reset : 00002
at power down : state retained
0
1
0
1
0
1
0
1
FR03
FR02
FR01
FR00
N-channel open-drain output
CMOS output
N-channel open-drain output
CMOS output
N-channel open-drain output
CMOS output
N-channel open-drain output
CMOS output
Ports P12, P13 output structure selection
bit
Ports P10, P11 output structure selection
bit
Ports P02, P03 output structure selection
bit
Ports P00, P01 output structure selection
bit
Port output structure control register FR0
at reset : 00002
at power down : state retained
0
1
0
1
0
1
0
1
FR13
FR12
FR11
FR10
N-channel open-drain output
CMOS output
N-channel open-drain output
CMOS output
N-channel open-drain output
CMOS output
N-channel open-drain output
CMOS output
Port D3 output structure selection bit
Port D2 output structure selection bit
Port D1 output structure selection bit
Port D0 output structure selection bit
Port output structure control register FR1
at reset : 00002
at power down : state retained
0
1
0
1
0
1
0
1
FR23
FR22
FR21
FR20
N-channel open-drain output
CMOS output
N-channel open-drain output
CMOS output
N-channel open-drain output
CMOS output
N-channel open-drain output
CMOS output
Port D7/CNTR0 output structure selection bit
Port D6 output structure selection bit
Port D5 output structure selection bit
Port D4 output structure selection bit
Port output structure control register FR2
at reset : 00002
at power down : state retained
0
1
0
1
0
1
0
1
Note: “R” represents read enabled, and “W” represents write enabled.
R/W
TAPU1/
TPU1A
W
TFR0A
W
TFR1A
W
TFR2A
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