參數(shù)資料
型號(hào)： M34551M4-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP48
封裝： 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁(yè)數(shù)： 33/71頁(yè)
文件大小： 966K
代理商： M34551M4-XXXFP
36
MITSUBISHI MICROCOMPUTERS
4551 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for
INFRARED REMOTE CONTROL TRANSMITTER
CLOCK CONTROL
The clock control circuit consists of the following circuits.
q Clock generating circuit
q Control circuit to stop the clock oscillation
q System clock (STCK) selection circuit
q Instruction clock (INSTCK) generating circuit
q Control circuit to return from the power down state
Fig. 37 Clock control circuit structure
(1) Clock control register
q Clock control register MR
Register MR controls the system clock. Set the contents
of this register through register A with the TMRA
OSC
XIN
XOUT
OSC
XCIN
XCOUT
Internal clock
generating circuit
(divided by 3)
MR0
R
S
Q
R
S
Q
POF instruction
POF2 instruction
MR1
T2F flag
Falling detected
Ports P0, P1
RESET
Multiplexer
Frequency
dividing circuit
(divided by 4)
MR3
0
1
STCK
INSTCK
instruction. In addition, the TAMR instruction can be used
to transfer the contents of register MR to register A.
Table 18 Clock control register
System clock (STCK) selection bit
f(XCIN) oscillation circuit control bit
f(XIN) oscillation circuit control bit
Clock selection bit
at reset : 10002
at power down : state retained
Clock control register MR
R/W
MR3
MR2
MR1
MR0
MR0=0 f(XIN)
MR0=1 f(XCIN)
MR0=0 f(XIN)/4
MR0=1 f(XCIN)/4
f(XCIN) oscillation stop, ports D6 and D7 selected
f(XCIN) oscillation enabled, ports D6 and D7 not selected
Oscillation enabled
Oscillation stop
f(XIN)
f(XCIN)
0
1
0
1
0
1
0
1
Note: “R” represents read enabled, and “W” represents write enabled.
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參數(shù)描述
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