參數(shù)資料
型號： M34524MC-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù)： 11/66頁
文件大?。?/td> 1936K
代理商： M34524MC-XXXFP
Rev.1.04
Aug 23, 2007
Page 19 of 146
REJ03B0188-0104
4559 Group
(5) Stack registers (SKs) and stack pointer (SP)
Stack registers are 14-bit registers.
Stack registers (SKs) are used to temporarily store the contents of
program counter (PC) just before branching until returning to the
original routine when;
branching to an interrupt service routine (referred to as an
interrupt service routine),
performing a subroutine call, or
executing the table reference instruction (TABP p).
Stack registers (SKs) are eight identical registers, so that
subroutines can be nested up to 8 levels. However, one of stack
registers is used respectively when using an interrupt service
routine and when executing a table reference instruction.
Accordingly, be careful not to over the stack when performing
these operations together. The contents of registers SKs are
destroyed when 8 levels are exceeded.
The register SK nesting level is pointed automatically by 3-bit
stack pointer (SP). The contents of the stack pointer (SP) can be
transferred to register A with the TASP instruction.
Figure 16 shows the stack registers (SKs) structure.
Figure 17 shows the example of operation at subroutine call.
(6) Interrupt stack register (SDP)
Interrupt stack register (SDP) is a 1-stage register. When an
interrupt occurs, this register (SDP) is used to temporarily store
the contents of data pointer, carry flag, skip flag, register A, and
register B just before an interrupt until returning to the original
routine.
Unlike the stack registers (SKs), this register (SDP) is not used
when executing the subroutine call instruction and the table
reference instruction.
(7) Skip flag
Skip flag controls skip decision for the conditional skip
instructions and continuous described skip instructions. When an
interrupt occurs, the contents of skip flag is stored automatically
in the interrupt stack register (SDP) and the skip condition is
retained.
Fig 16. Stack registers (SKs) structure
Fig 17. Example of operation at subroutine call
Program counter (PC)
SK0
SK1
SK2
SK3
SK4
SK5
SK6
SK7
(SP) = 0
(SP) = 1
(SP) = 2
(SP) = 3
(SP) = 4
(SP) = 5
(SP) = 6
(SP) = 7
Stack pointer (SP) points “7” at reset or
returning from power down mode.
It points “0” b y executing the first B M
instruction, and the contents of program
counter is stored in SK0.
When the BM instruction is executed after
eight stack registers are used ((SP) = 7), (SP)
= 0 and the contents of SK0 is destroyed.
Executing BM instruction
Executing RT instruction
(SP)
← 0
(SK0)
← 000116
(PC)
← SUB1
(PC)
← (SK0)
(SP)
← 7
Main program
Address
000016 NOP
000116 BM SUB1
000216 NOP
SUB1:
NOP
RT
Subroutine
Note :Returning to the BM instruction execution
address with the RT instruction, and the BM
instruction becomes the NOP instruction.
..
.
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