參數(shù)資料
型號: M34518M4-XXXSP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDIP32
封裝: 8.90 X 28 MM, 1.78 MM PITCH, PLASTIC, SDIP-32
文件頁數(shù): 106/162頁
文件大?。?/td> 1149K
代理商: M34518M4-XXXSP
Rev.3.01
2005.06.15
page 46 of 157
REJ03B0008-0301
4518 Group
Fig. 35 Program example to start/stop watchdog timer
Fig. 36 Program example to enter the mode when using the
watchdog timer
WRST
; WDF1 flag cleared
NOP
DI
; Interrupt disabled
EPOF
; POF instruction enabled
POF
Oscillation stop
When the watchdog timer is used, clear the WDF1 flag at the pe-
riod of 65534 machine cycles or less with the WRST instruction.
When the watchdog timer is not used, execute the DWDT instruc-
tion and the WRST instruction continuously (refer to Figure 35).
The watchdog timer is not stopped with only the DWDT instruction.
The contents of WDF1 flag and timer WDT are initialized at the
RAM back-up mode.
When using the watchdog timer and the RAM back-up mode, ini-
tialize the WDF1 flag with the WRST instruction just before the
microcomputer enters the RAM back-up state (refer to Figure 36).
The watchdog timer function is valid after system is returned from
the RAM back-up. When not using the watchdog timer function, ex-
ecute the DWDT instruction and the WRST instruction continuously
every system is returned from the RAM back-up, and stop the
watchdog timer function.
WRST
; WDF1 flag cleared
DI
DWDT
; Watchdog timer function enabled/disabled
WRST
; WEF and WDF1 flags cleared
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