參數(shù)資料
型號(hào): M34518E8SP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDIP32
封裝: 8.90 X 28 MM, 1.78 MM PITCH, PLASTIC, SDIP-32
文件頁(yè)數(shù): 140/162頁(yè)
文件大?。?/td> 1149K
代理商: M34518E8SP
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Rev.3.01
2005.06.15
page 77 of 157
REJ03B0008-0301
4518 Group
External clock
When the external clock signal for the main clock (f(XIN)) is used,
connect the clock source to XIN pin and XOUT pin open. In pro-
gram, after the CMCK instruction is executed, set main clock
(f(XIN)) oscillation start to be enabled (MR1=0).
For this product, when RAM back-up mode and main clock
(f(XIN)) stop (MR1=1), XIN pin is fixed to “H” in order to avoid the
through current by floating of internal logic. The XIN pin is fixed to
“H” until main clock (f(XIN)) oscillation start to be valid (MR1=0)
by the CMCK instruction from reset state. Accordingly, when an
external clock is used, connect a 1 k
or more resistor to XIN pin
in series to limit of current by competitive signal.
Electric Characteristic Differences Between Mask ROM and One
Time PROM Version MCU
There are differences in electric characteristics, operation mar-
gin, noise immunity, and noise radiation between Mask ROM and
One Time PROM version MCUs due to the difference in the
manufacturing processes.
When manufacturing an application system with the One time
PROM version and then switching to use of the Mask ROM ver-
sion, please perform sufficient evaluations for the commercial
samples of the Mask ROM version.
Note on Power Source Voltage
When the power source voltage value of a microcomputer is less
than the value which is indicated as the recommended operating
conditions, the microcomputer does not operate normally and
may perform unstable operation.
In a system where the power source voltage drops slowly when
the power source voltage drops or the power supply is turned off,
reset a microcomputer when the supply voltage is less than the
recommended operating conditions and design a system not to
cause errors to the system by this unstable operation.
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POF instruction
When the POF instruction is executed continuously after the
EPOF instruction, system enters the RAM back-up state.
Note that system cannot enter the RAM back-up state when ex-
ecuting only the POF instruction.
Be sure to disable interrupts by executing the DI instruction be-
fore executing the EPOF instruction and the POF instruction
continuously.
Program counter
Make sure that the PC does not specify after the last page of the
built-in ROM.
Power-on reset
When the built-in power-on reset circuit is used, the time for the
supply voltage to rise from 0 V to the value of supply voltage or
more must be set to 100
s or less. If the rising time exceeds
100
s, connect a capacitor between the RESET pin and VSS at
the shortest distance, and input “L” level to RESET pin until the
value of supply voltage reaches the minimum operating voltage.
Clock control
Execute the main clock (f(XIN)) selection instruction (CMCK,
CRCK or CYCK instruction) in the initial setting routine of pro-
gram (executing it in address 0 in page 0 is recommended).
The oscillation circuit by the CMCK, CRCK or CYCK instruction
can be selected only at once. The oscillation circuit correspond-
ing to the first executed one of these instructions is valid.
The CMCK, CRCK, and CYCK instructions can be used only to
select main clock (f(XIN)). In this time, the start of oscillation and
the switch of system clock are not performed.
When the CMCK, CRCK, and CYCK instructions are never ex-
ecuted, main clock (f(XIN)) cannot be used and system can be
operated only by on-chip oscillator.
The no operated clock source (f(RING)) or (f(XIN)) cannot be
used for the system clock. Also, the clock source (f(RING) or
f(XIN)) selected for the system clock cannot be stopped.
On-chip oscillator
The clock frequency of the on-chip oscillator depends on the
supply voltage and the operation temperature range.
Be careful that variable frequencies when designing application
products.
When considering the oscillation stabilize wait time at the switch
of clock, be careful that the variable frequency of the on-chip
oscillator clock.
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