參數(shù)資料
      型號: M34514M6-XXXFP
      元件分類: 微控制器/微處理器
      英文描述: 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDSO42
      封裝: 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
      文件頁數(shù): 21/99頁
      文件大?。?/td> 1204K
      代理商: M34514M6-XXXFP
      25
      4513/4514 Group
      SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
      MITSUBISHI MICROCOMPUTERS
      (1) External 0 interrupt request flag (EXF0)
      External 0 interrupt request flag (EXF0) is set to “1” when a valid
      waveform is input to P30/INT0 pin.
      The valid waveforms causing the interrupt must be retained at their
      level for 4 clock cycles or more of the system clock (Refer to Figure
      16).
      The state of EXF0 flag can be examined with the skip instruction
      (SNZ0). Use the interrupt control register V1 to select the interrupt
      or the skip instruction. The EXF0 flag is cleared to “0” when an in-
      terrupt occurs or when the next instruction is skipped with the skip
      instruction.
      The P30/INT0 pin need not be selected the external interrupt input
      INT0 function or the normal I/O port P30 function. However, the
      EXF0 flag is set to “1” when a valid waveform is input even if it is
      used as an I/O port P30.
      External 0 interrupt activated condition
      External 0 interrupt activated condition is satisfied when a valid
      waveform is input to P30/INT0 pin.
      The valid waveform can be selected from rising waveform, falling
      waveform or both rising and falling waveforms. An example of
      how to use the external 0 interrupt is as follows.
      Select the valid waveform with the bits 1 and 2 of register I1.
      Clear the EXF0 flag to “0” with the SNZ0 instruction.
      Set the NOP instruction for the case when a skip is performed
      with the SNZ0 instruction.
      Set both the external 0 interrupt enable bit (V10) and the INTE
      flag to “1.”
      The external 0 interrupt is now enabled. Now when a valid wave-
      form is input to the P30/INT0 pin, the EXF0 flag is set to “1” and the
      external 0 interrupt occurs.
      (2) External 1 interrupt request flag (EXF1)
      External 1 interrupt request flag (EXF1) is set to “1” when a valid
      waveform is input to P31/INT1 pin.
      The valid waveforms causing the interrupt must be retained at their
      level for 4 clock cycles or more of the system clock (Refer to Figure
      16).
      The state of EXF1 flag can be examined with the skip instruction
      (SNZ1). Use the interrupt control register V1 to select the interrupt
      or the skip instruction. The EXF1 flag is cleared to “0” when an in-
      terrupt occurs or when the next instruction is skipped with the skip
      instruction.
      The P31/INT1 pin need not be selected the external interrupt input
      INT1 function or the normal I/O port P31 function. However, the
      EXF1 flag is set to “1” when a valid waveform is input even if it is
      used as an I/O port P31.
      External 1 interrupt activated condition
      External 1 interrupt activated condition is satisfied when a valid
      waveform is input to P31/INT1 pin.
      The valid waveform can be selected from rising waveform, falling
      waveform or both rising and falling waveforms. An example of
      how to use the external 1 interrupt is as follows.
      Select the valid waveform with the bits 1 and 2 of register I2.
      Clear the EXF1 flag to “0” with the SNZ1 instruction.
      Set the NOP instruction for the case when a skip is performed
      with the SNZ1 instruction.
      Set both the external 1 interrupt enable bit (V11) and the INTE
      flag to “1.”
      The external 1 interrupt is now enabled. Now when a valid wave-
      form is input to the P31/INT1 pin, the EXF1 flag is set to “1” and the
      external 1 interrupt occurs.
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