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參數(shù)資料
| 型號： | M34513M6-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQFP32 |
| 封裝： | 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32 |
| 文件頁數(shù)： | 28/97頁 |
| 文件大?。?/td> | 1276K |
| 代理商： | M34513M6-XXXFP |
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33
4513/4514 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
WATCHDOG TIMER
Watchdog timer provides a method to reset the system when a pro-
gram runs wild. Watchdog timer consists of a 16-bit timer (WDT),
watchdog timer enable flag (WEF), and watchdog timer flags
(WDF1, WDF2).
The timer WDT downcounts the instruction clocks as the count
source. The underflow signal is generated when the count value
reaches “000016.” This underflow signal can be used as the timer 2
count source.
When the WRST instruction is executed after system is released
from reset, the WEF flag is set to “1”. At this time, the watchdog
timer starts operating.
When the count value of timer WDT reaches “BFFF16” or “3FFF16,”
the WDF1 flag is set to “1.” If the WRST instruction is never ex-
ecuted while timer WDT counts 32767, WDF2 flag is set to “1,” and
the RESET pin outputs “L” level to reset the microcomputer. Ex-
ecute the WRST instruction at each period of 32766 machine cycle
or less by software when using watchdog timer to keep the micro-
computer operating normally.
To prevent the WDT stopping in the event of misoperation, WEF
flag is designed not to initialize once the WRST instruction has
been executed. Note also that, if the WRST instruction is never ex-
ecuted, the watchdog timer does not start.
Fig. 20 Watchdog timer function
The contents of WEF, WDF1 and WDF2 flags and timer WDT are
initialized at the RAM back-up mode.
If WDF2 flag is set to “1” at the same time that the microcomputer
enters the RAM back-up state, system reset may be performed.
When using the watchdog timer and the RAM back-up mode, ini-
tialize the WDF1 flag with the WRST instruction just before the
microcomputer enters the RAM back-up state (refer to Figure 21)
Fig. 21 Program example to enter the RAM back-up mode
when using the watchdog timer
WRST
; WDF1 flag reset
POF
EPOF
; POF instruction enabled
(RAM back-up state)
Oscillation
stop
FFFF16
0000 16
3FFF16
BFFF16
The value of timer (WDT)
WDF1 flag
WDF2 flag
WRST
instruction
executed
RESET pin output
System reset
WRST
instruction
executed
WEF flag
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M34513E4SP | 4-BIT, OTPROM, 4.2 MHz, MICROCONTROLLER, PDIP32 |
| M34514M6-XXXFP | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDSO42 |
| M34514E8FP | 4-BIT, OTPROM, 4.2 MHz, MICROCONTROLLER, PDSO42 |
| M34513M8-XXXFP | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PQFP32 |
| M34513M4-XXXSP | 4-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDIP32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M34513M8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513M8-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34513T-PTCA | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Converter for Connecting 32-pin 1.778mm-pitch SDIP (for 4500 Series) |
| M34513T-PTCB | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Converter for Connecting 32-pin 1.778mm-pitch SDIP to 40-core narrow-pitch(for 4500 Series) |
| M34513T-PTCC | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Converter for Connecting 40-core narrow-pitch to 32-pin 0.8mm-pitch LQFP(for 4500 Series) |
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