
49
4513/4514 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
change.
Some parametric limits are subject to
 Program counter (PC) ..........................................................................................................
  Address 0 in page 0 is set to program counter.
 Interrupt enable flag (INTE)..................................................................................................
 Power down flag (P) .............................................................................................................
 External 0 interrupt request flag (EXF0) ..............................................................................
 External 1 interrupt request flag (EXF1) ..............................................................................
 Interrupt control register V1..................................................................................................
 Interrupt control register V2..................................................................................................
 Interrupt control register I1 ...................................................................................................
 Interrupt control register I2 ...................................................................................................
 Timer 1 interrupt request flag (T1F) .....................................................................................
 Timer 2 interrupt request flag (T2F) .....................................................................................
 Timer 3 interrupt request flag (T3F) .....................................................................................
 Timer 4 interrupt request flag (T4F) .....................................................................................
 Watchdog timer flags (WDF1, WDF2)..................................................................................
 Watchdog timer enable flag (WEF) ......................................................................................
 Timer control register W1 .....................................................................................................
 Timer control register W2 .....................................................................................................
 Timer control register W3 .....................................................................................................
 Timer control register W4 .....................................................................................................
 Timer control register W6 .....................................................................................................
 Clock control register MR .....................................................................................................
 Serial I/O transmission/reception completion flag (SIOF) ...................................................
 Serial I/O mode register J1 ..................................................................................................
 Serial I/O register SI .............................................................................................................
 A-D conversion completion flag (ADF).................................................................................
 A-D control register Q1 .........................................................................................................
 A-D control register Q2 .........................................................................................................
 Voltage comparator control register Q3 ...............................................................................
 Successive comparison register AD ....................................................................................
 Comparator register..............................................................................................................
 Key-on wakeup control register K0 ......................................................................................
 Pull-up control register PU0 .................................................................................................
 Direction register FR0 ..........................................................................................................
 Carry flag (CY)......................................................................................................................
 Register A .............................................................................................................................
 Register B .............................................................................................................................
 Register D .............................................................................................................................
 Register E .............................................................................................................................
 Register X .............................................................................................................................
 Register Y .............................................................................................................................
 Register Z .............................................................................................................................
 Stack pointer (SP) ................................................................................................................
“
” represents undefined.
Fig. 35 Internal state at reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(Interrupt disabled)
0
0
0
0
0
0
0
0
0
0
0
0
(Interrupt disabled)
(Interrupt disabled)
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
(Prescaler and timer 1 stopped)
(Timer 2 stopped)
(Timer 3 stopped)
(Timer 4 stopped)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
(Port P5: input mode)
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
1
(External clock selected and serial
I/O port not selected)