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參數(shù)資料
| 型號： | M34250E2-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, OTPROM, 4.4 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | PLASTIC, SOP-20 |
| 文件頁數(shù)： | 15/61頁 |
| 文件大?。?/td> | 654K |
| 代理商： | M34250E2-XXXFP |
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19
MITSUBISHI MICROCOMPUTERS
4250 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
K03
K02
K01
K00
Instruction clock divided by 4
Instruction clock divided by 512
Rising waveform (“L”
→ “H”)
Falling waveform (“H”
→ “L”)
Key-on wakeup not used
Key-on wakeup used (“L” level recognized)
Key-on wakeup not used
Key-on wakeup used (“L” level recognized)
Prescaler dividing ratio selection bit
Interrupt valid waveform for INT pin/
key-on wakeup valid waveform selection
bit (Note 2)
Ports G1–G3 key-on wakeup control bit
Ports S0–S3 key-on wakeup control bit
Key-on wakeup control register K0
at reset : 00002
at RAM back-up : state retained
0
1
0
1
0
1
0
1
R/W
Notes 1: “R” represents read enabled, and “W” represents write enabled.
2: Set a value to the bit 2 of register K0, and execute the SNZ0 instruction to clear the EXF0 flag to “0” after executing at least
one instruction. According to the input state of G0/INT pin, the external interrupt request flag (EXF0) may be set to “1” when
the interrupt valid waveform is changed.
(1) External interrupt request flag (EXF0)
External interrupt request flag (EXF0) is set to “1” when a valid
waveform is input to G0/INT pin.
The valid waveforms causing the interrupt must be retained
at their level for 5 cycles or more of f(XIN) (Refer to Figure
16).
The state of EXF0 flag can be examined with the skip
instruction (SNZ0). Use the timer control register V1 to select
the interrupt or the skip instruction. The EXF0 flag is cleared
to “0” when an interrupt occurs or when the next instruction is
skipped with the skip instruction.
External interrupt activated condition
External interrupt activated condition is satisfied when a
valid waveform is input to G0/INT pin.
The valid waveform can be selected from rising waveform
or falling waveform. An example of how to use the external
interrupt is as follows.
Select the valid waveform with the bit 2 of register K0.
Clear the EXF0 flag to “0” with the SNZ0 instruction.
Set the NOP instruction for the case when a skip is
performed with the SNZ0 instruction.
Set both the external interrupt enable bit (V10) and the INTE
flag to “1.”
The external interrupt is now enabled. Now when a valid
waveform is input to the G0/INT pin, the EXF0 flag is set to “1”
and the external interrupt occurs.
(2) Control register related to external interrupt
Key-on wakeup control register K0
Register K0 controls the valid waveform for the external
interrupt and key-on wakeup function. Set the contents of
this register through register A with the TK0A instruction.
The TAK0 instruction can be used to transfer the contents
of register K0 to register A.
Table 8 Control register related to external interrupt
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