(7)
10.5.3 TMS Related Register Map ................................................................10-142
10.5.4 TMS Control Registers .......................................................................10-143
10.5.5 TMS Counters (TMS0CT, TMS1CT) ..................................................10-145
10.5.6 TMS Measure Registers (TMS0MR3-0, TMS1MR3-0).......................10-146
10.5.7 Operation of TMS Measure Input .......................................................10-147
10.6 TML (Input-related 32-bit Timer) ..............................................................10-149
10.6.1 Outline of TML ....................................................................................10-149
10.6.2 Outline of TML Operation ...................................................................10-150
10.6.3 TML Related Register Map.................................................................10-151
10.6.4 TML Control Registers........................................................................10-152
10.6.5 TML Counters .....................................................................................10-154
10.6.6 TML Measure Registers .....................................................................10-156
10.6.7 Operation of TML Measure Input........................................................10-158
10.7 TID (Input-related 16-bit Timer)................................................................10-160
10.7.1 Outline of TID......................................................................................10-160
10.7.2 TID Related Register Map ..................................................................10-162
10.7.3 TID Control &Prescaler Enable Registers ..........................................10-163
10.7.4 TID Counters (TID0CT, TID1CT, TID2CT) .........................................10-166
10.7.5 TID Reload Registers (TID0RL, TID1RL, TID2RL).............................10-167
10.7.6 Outline of Each Mode of TID ..............................................................10-168
10.8 TOD (Output-related 16-bit Timer)...........................................................10-173
10.8.1 Outline of TOD....................................................................................10-173
10.8.2 Outline of Each Mode of TOD.............................................................10-175
10.8.3 TOD Related Register Map ................................................................10-177
10.8.4 TOD Control Registers (TOD0CR) .....................................................10-180
10.8.5 TOD Counters.....................................................................................10-182
10.8.6 TOD Reload 0 Registers.....................................................................10-184
10.8.7 TOD Reload 1 Registers.....................................................................10-186
10.8.8 TOD Enable Protect Registers ...........................................................10-188
10.8.9 TOD Cout Enable Registers ...............................................................10-190
10.8.10 Operation in TOD PWM Output Mode ..............................................10-193
10.8.11
Operation in TOD Single-shot Output Mode (without Correction Function)
10-197
10.8.12
Operation in TOD Delayed Single-shot Output Mode (without Correction Function)
10-199