參數(shù)資料
型號: M30842SFP
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 32 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁數(shù): 7/89頁
文件大小: 764K
代理商: M30842SFP
Page 15
1. Overview
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Apply 3.0 to 5.5V to both VCC1 and VCC2 pins. Apply 0V to the
VSS pin. VCC1
≥ VCC2(1, 2)
Supplies power to the A/D converter. Connect the AVCC pin to
VCC1 and the AVSS pin to VSS
___________
The microcomputer is in a reset state when "L" is applied to the RESET pin
Switches processor mode. Connect the CNVSS pin to VSS to start up
in single-chip mode or to VCC1 to start up in microprocessor mode
Switches data bus width in external memory space 3. The data
bus is 16 bits wide when the BYTE pin is held "L" and 8 bits wide
when it is held "H". Set to either. Connect the BYTE pin to VSS
to use the microcomputer in single-chip mode
Inputs and outputs data (D0 to D7) while accessing an external
memory space with separate bus
Inputs and outputs data (D8 to D15) while accessing an external
memory space with 16-bit separate bus
Outputs address bits A0 to A22
Outputs inversed address bit A23
Inputs and outputs data (D0 to D7) and outputs 8 low-order
address bits (A0 to A7) by time-sharing while accessing an
external memory space with multiplexed bus
Inputs and outputs data (D8 to D15) and outputs 8 middle-order
address bits (A8 to A15) by time-sharing while accessing an
external memory space with 16-bit multiplexed bus
_______
Outputs CS0 to CS3 that are chip-select signals specifying an external space
________
_________
______
________
_____
________
Outputs WRL, WRH, (WR, BHE) and RD signals. WRL and
_________
______
_______
WRH can be switched with WR and BHE by program
________
_________
_____
WRL, WRH and RD selected:
If external data bus is 16 bits wide, data is written to an even
________
address in external memory space when WRL is held "L".
_________
Data is written to an odd address when WRH is held "L".
_____
Data is read when RD is held "L".
______
________
_____
WR, BHE and RD selected:
______
Data is written to external memory space when WR is held "L".
_____
Data in an external memory space is read when RD is held "L".
________
An odd address is accessed when BHE is held "L".
______
________
_____
Select WR, BHE and RD for external 8-bit data bus.
ALE is a signal latching the address
__________
The microcomputer is placed in a hold state while the HOLD pin is held "L"
Outputs an "L" signal while the microcomputer is placed in a hold state
________
Bus is placed in a wait state while the RDY pin is held "L"
VCC1, VCC2
VSS
AVCC
AVSS
____________
RESET
CNVSS
BYTE
D0 to D7
D8 to D15
A0 to A22
______
A23
A0/D0 to
A7/D7
A8/D8 to
A15/D15
______
CS0 to CS3
________
______
WRL / WR
_________
________
WRH / BHE
_____
RD
ALE
__________
HOLD
__________
HLDA
________
RDY
Power Supply
Analog Power
Supply
Reset Input
CNVSS
Input to Switch
External Data Bus
Width(3)
Bus Control
Pins(3)
I
I/O
O
I/O
O
I
O
I
-
VCC1
VCC2
Supply
Classsfication
Symbol
I/O Type
Function
Voltage
I : Input
O : Output
I/O : Input and output
NOTES:
1. VCC1 is hereinafter referred to as VCC unless otherwise noted.
2. Apply 4.2 to 5.5V to the VCC1 and VCC2 pins when using M32C/84T. VCC1=VCC2.
3. Bus cotrol pins in M32C/84T cannot be used.
1.6 Pin Description
Table 1.6 Pin Description (100-Pin and 144-Pin Packages)
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