
Under
development
Preliminary Specifications REV.D
Specifications in this manual are tentative and subject to change.
Mitsubishi Microcomputers
M16C/80 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Usage precaution
217
Setting the registers
The registers shown in Table 1.27.3 include indeterminate bit when read. Set immidiate to these regis-
ters.
Store the content of the frequently used register to RAM, change the content of RAM, then transfer to the
register.
Table 1.27.3 The object registers
Register name
Symbol
Address
UART4 bit rate generator
U4BRG
02F916
UART4 transfer buffer register
U4TB
02FB16, 02FA16
Dead time timer
DTT
030C16
Timer B2 interrupt occurrence frequency set counter
ICTB2
030D16
UART3 bit rate generator
U3BRG
032916
UART3 transfer buffer register
U3TB
032B16, 032A16
UART2 bit rate generator
U2BRG
033916
UART2 transfer buffer register
U2TB
033B16, 033A16
Up-down flag
UDF
034416
Timer A0 register (Note)
TA0
034716, 034616
Timer A1 register (Note)
TA1
034916, 034816
Timer A2 register (Note)
TA2
034B16, 034A16
Timer A3 register (Note)
TA3
034D16, 034C16
Timer A4 register (Note)
TA4
034F16, 034E16
UART0 bit rate generator
U0BRG
036116
UART0 transfer buffer register
U0TB
036316, 036216
UART1 bit rate generator
U1BRG
036916
UART1 transfer buffer register
U1TB
036B16, 036A16
Note: In one-shot timer mode and pulse widt modulation mode.
External ROM version (144-pin version)
The external ROM version is operated only in microprocessor mode, so be sure to perform the following:
Connect CNVss pin to Vcc.
Notes on the microprocessor mode and transition after shifting from the micropro-
cessor mode to the memory expansion mode / sigle-chip mode
In microprocessor mode, the SFR, internal RAM, and external memory space can be accessed.
For that reason, the internal ROM area cannot be accessed.
After the reset has been released and the operation of shifting from the microprocessor mode has started
(“H” applied to the CNVSS pin), the internal ROM area cannot be accessed even if the CPU shifts to the
memory expansion mode or single-chip mode.
Flash memory version
Bit 7 and bit 6 of the processor mode register 1 (address 000516) must be set to "112" and this setting
should be done when the main clock is divided by 8.