Rev.1.00
May 18, 2004
page 269 of 296
M306V7MG/MH/MJ/MJA-XXXFP, M306V7FG/FH/FJ/FJAFP
Flash memory (USER) control register
Symbol
Address
When reset
FMRU
031316
XX0000012
W
R
b7
b6
b5
b4
b3
b2
b1
b0
FMRU0
Bit symbol
Bit name
Function
RW
CPU rewrite mode
select bit (Note 1)
0: Busy (being written or erased)
1: Ready
0: Normal mode
(Software commands invalid)
1: CPU rewrite mode
(Software commands acceptable)
FMRU1
0: Boot ROM area is accessed
1: User ROM area is accessed
Flash memory reset bit
(Note 2)
0: Normal operation
1: Reset
Nothing is assigned.
When write, set "0". When read, values are indeterminate.
User ROM area select bit
(Note 3) (Effective in only
boot mode)
FMRU3
FMRU5
0
Note 1: For this bit to be set to “1”, the user needs to write a “0” and then a “1” to
Note 1: Perform the writing to this register in byte size.
(Example : MOV.B #021h, FMSEL)
2: Must always be set to “0” when CPU writing is not performed.
(OSD display operation may be affected)
it in succession. When it is not this procedure, it is not enacted in “1”.
This is necessary to ensure that no interrupt or DMA transfer will be
executed during the interval. Use the control program except in the
internal flash memory for write to this bit.
Note 2: Effective only when the CPU rewrite mode select bit = 1. Set this bit to 0
subsequently after setting it to 1 (reset).
Note 3: Use the control program except in the internal flash memory for write to
this bit.
RY/BY status flag
Flash memory (USER/OSD) switch register
Symbol
Address
When reset
FMSEL
031816
X00000002
W
R
b7
b6
b5
b4
b3
b2
b1
b0
Bit symbol
Bit name
Function
RW
USER/OSD switch
0: Select USER ROM area
1: Select OSD ROM area
OSELBIT
OSD ROM connection
Set the same value as OSELBIT
(note1)
(note 2)
OSDCONN
0
Reserved bit
Must always be set to “0”
Reserved bit
Must always be set to “0”
Reserved bit
Must always be set to “0”
0
Reserved bit
Must always be set to “0”
00
Nothing is assigned.
When write, set "0". When read, values are indeterminate.
0
0: Busy (being written or erased)
1: Ready
0: Normal mode
(Software commands invalid)
1: CPU rewrite mode
(Software commands acceptable)
Flash memory (USER) control register
Symbol
Address
When reset
FMRD
031716
XX0000012
W
R
b7
b6
b5
b4
b3
b2
b1
b0
FMRD0
Bit symbol
Bit name
Function
CPU rewrite mode
select bit (Note 1)
FMRD1
Flash memory reset
bit (Note 2)
Nothing is assigned.
When write, set "0". When read, values are indeterminate.
FMRD3
0
Reserved bit
Must always be set to “0”
Reserved bit
Must always be set to “1”
0
Reserved bit
Must always be set to “0”
1
RY/BY status flag
0: Normal operation
1: Reset
Figure 7.2.1. Flash memory control register, Flash memory switch register