參數(shù)資料
型號(hào): M306V2EEFP
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁(yè)數(shù): 235/256頁(yè)
文件大?。?/td> 1980K
代理商: M306V2EEFP
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M306V2ME-XXXFP
M306V2EEFP
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
8
Rev. 1.0
Table 1.5.4 Pin description (continued) (2)
Signal nameFunction
Pin name
I/O type
I/O port P5
Input/output
I/O port P6
P50 to P57
P60 to P63,
P67
This is an 8-bit I/O port equivalent to P0. In single-chip mode, P57 in
this port outputs a divide-by-8 or divide-by-32 clock of XIN or a clock of
the same frequency as XCIN as selected by software.
Output
Input
Output
Input
This is an 5-bit I/O port equivalent to P0. When set for input in single-
chip, microprocessor and memory expansion modes, the user can
specify in units of four bits via software whether or not they are tied to a
pull-up resistor. Pins in this port also function as UART0, UART2 and
multi-master I2C-BUS interface 0 I/O pins as selected by software.
WRL / WR,
WRH / BHE,
RD,
BCLK,
HLDA,
HOLD,
ALE,
RDY
Output WRL, WRH (WR and BHE), RD, BCLK, HLDA, and ALE
signals. WRL and WRH, and BHE and WR can be switched using
software control.
s WRL, WRH, and RD selected
With a 16-bit external data bus, data is written to even addresses
when the WRL signal is “L” and to the odd addresses when the WRH
signal is “L”. Data is read when RD is “L”.
s WR, BHE, and RD selected
Data is written when WR is “L”. Data is read when RD is “L”. Odd
addresses are accessed when BHE is “L”. Use this mode when using
an 8-bit external data bus.
While the input level at the HOLD pin is “L”, the microcomputer is
placed in the hold state. While in the hold state, HLDA outputs a “L”
level. ALE is used to latch the address. While the input level of the
RDY pin is “L”, the microcomputer is in the ready state.
Input/output
I/O port P7
I/O port P8
I/O port P9
I/O port P10
P70 to P77
P82, P83,
P86, P87
P90 to P94
P100 to P107
This is an 8-bit I/O port equivalent to P6 (P70 and P71 are N-channel
open-drain output). Pins in this port also function as timers A2 and A3,
UART2, multi-master I2C-BUS interface 0, or HSYNC counter I/O pins as
selected by software.
This is an 5-bit I/O port equivalent to P6. Pins in this port also function
as Timer B0 to B2 input pins, D-A converter output pins, or multi-master
I2C-BUS interface 1 I/O pins.
This is an 8-bit I/O port equivalent to P6. Pins in this port also function
as A-D converter input pins. Furthermore, P100 and P101 also function
as input pins for OSD function.
P82, P83, P86 and P87 are I/O ports with the same functions as P6.
Using software, P82 and P83 can be made to function as the I/O pins for
the input pins for external interrupts. P86 and P87 can be set using
software to function as the I/O pins for a sub-clock generation circuit. In
this case, connect a quartz oscillator between P86 (XCOUT pin) and P87
(XCIN pin).
R, G, B
OSC1
OSC2
CVIN
VHOLD
HLF
TVSETB
OSD output
Clock input
for OSD
Clock output
for OSD
I/O for data
slicer
Test input
Output
Input
Output
Input
These are OSD output pins (analog output).
This is an OSD clock input pin.
This is an OSD clock output pin.
Input composite video signal through a capacitor.
Connect a capacitor between VHOLD and Vss.
Connect a filter using of a capacitor and a resistor
between HLF and Vss.
This is a test input pin. Fix it to “L.”
OUT1, OUT2
These are OSD output pins (digital output).
OSD output
Output
Input/output
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