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參數(shù)資料
| 型號(hào)： | M306N5MCT-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁數(shù)： | 33/63頁 |
| 文件大?。?/td> | 825K |
| 代理商： | M306N5MCT-XXXGP |
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Mitsubishi microcomputers
M16C / 62A Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
DMAC
63
(1) Transfer cycle
The transfer cycle consists of the bus cycle in which data is read from memory or from the SFR area
(source read) and the bus cycle in which the data is written to memory or to the SFR area (destination
write). The number of read and write bus cycles depends on the source and destination addresses. In
memory expansion mode and microprocessor mode, the number of read and write bus cycles also de-
pends on the level of the BYTE pin. Also, the bus cycle itself is longer when software waits are inserted.
(a) Effect of source and destination addresses
When 16-bit data is transferred on a 16-bit data bus, and the source and destination both start at odd
addresses, there are one more source read cycle and destination write cycle than when the source
and destination both start at even addresses.
(b) Effect of software wait
When the SFR area or a memory area with a software wait is accessed, the number of cycles is
increased for the wait by 1 bus cycle. The length of the cycle is determined by BCLK.
Figure 1.12.5 shows the example of the transfer cycles for a source read. For convenience, the destina-
tion write cycle is shown as one cycle and the source read cycles for the different conditions are shown.
In reality, the destination write cycle is subject to the same conditions as the source read cycle, with the
transfer cycle changing accordingly. When calculating the transfer cycle, remember to apply the respec-
tive conditions to both the destination write cycle and the source read cycle. For example (2) in Figure
1.12.5, if data is being transferred in 16-bit units on an 8-bit bus, two bus cycles are required for both the
source read cycle and the destination write cycle.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M306V0ME-XXXFP | 16-BIT, MROM, MICROCONTROLLER, PQFP100 |
| M306V0EEFP | 16-BIT, OTPROM, MICROCONTROLLER, PQFP100 |
| M306V2ME-XXXFP | 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100 |
| M306V2EEFP | 16-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP100 |
| M306V2EEFS | 16-BIT, UVPROM, 10 MHz, MICROCONTROLLER, CQCC100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M306N5MCV-XXXFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306N5MCV-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306N5MC-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKFHGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
| M306NKFHGP#U3 | 功能描述:IC M16C MCU FLASH 384K 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/60/6NK 標(biāo)準(zhǔn)包裝:1 系列:AVR® ATmega 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，SPI，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，WDT 輸入/輸出數(shù):32 程序存儲(chǔ)器容量:32KB（16K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:1K x 8 RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:44-TQFP 包裝:剪切帶 (CT) 其它名稱:ATMEGA324P-B15AZCT |
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