參數(shù)資料
型號： M3062LFGPGP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 47/104頁
文件大小： 1313K
代理商： M3062LFGPGP
5. Electrical Characteristics
Rev.2.41
Jan 10, 2006
Page 45 of 96
REJ03B0001-0241
NOTES:
1.
Referenced to VCC1=4.5 to 5.5V, 3.0 to 3.6V at Topr = 0 to 60
°C (D3, D5, U3, U5) unless otherwise specified.
2.
n denotes the number of block erases.
3.
Program and Erase Endurance refers to the number of times a block erase can be performed.
If the program and erase endurance is n (n=100, 1,000, or 10,000), each block can be erased n times.
For example, if a 4 Kbytes block A is erased after writing 1 word data 2,048 times, each to a different address, this counts as
one program and erase endurance. Data cannot be written to the same address more than once without erasing the block.
(Rewrite prohibited)
4.
Maximum number of E/W cycles for which operation is guaranteed.
5.
Topr = -40 to 85
°C (D3, D7, U3, U7) / -20 to 85 °C (D5, D9, U5, U9).
6.
Referenced to VCC1 = 4.5 to 5.5V, 3.0 to 3.6V at Topr = -40 to 85
°C (D7, U7) / -20 to 85 °C (D9, U9) unless otherwise specified.
7.
Table 5.7 applies for block A or block 1 program and erase endurance > 1,000. Otherwise, use Table 5.6.
8.
To reduce the number of program and erase endurance when working with systems requiring numerous rewrites, write to
unused word addresses within the block instead of rewrite. Erase block only after all possible addresses are used. For
example, an 8-word program can be written 256 times maximum before erase becomes necessary.
Maintaining an equal number of erasure between block A and block 1 will also improve efficiency. It is important to track the
total number of times erasure is used.
9.
Should erase error occur during block erase, attempt to execute clear status register command, then block erase command
at least three times until erase error disappears.
10. Set the PM17 bit in the PM1 register to “1” (wait state) when executing more than 100 times rewrites (D7, D9, U7 and U9).
11. Customers desiring E/W failure rate information should contact their Renesas technical support representative.
Table 5.6
Flash Memory Version Electrical Characteristics (1) for 100 cycle products (D3, D5, U3,
U5)
Symbol
Parameter
Standard
Unit
Min.
Typ.
Max.
Program and Erase Endurance (3)
100
cycle
Word Program Time (VCC1=5.0V
)
25
200
s
Lock Bit Program Time
25
200
s
Block Erase Time
(VCC1=5.0V
)
4-Kbyte block
0.3
4
s
8-Kbyte block
0.3
4
s
32-Kbyte block
0.5
4
s
64-Kbyte block
0.8
4
s
Erase All Unlocked Blocks Time (2)
4×n
s
tPS
Flash Memory Circuit Stabilization Wait Time
15
s
Data Hold Time (5)
10
year
Table 5.7
Flash Memory Version Electrical Characteristics (6) for 10,000 cycle products (D7, D9,
U7, U9) (Block A and Block 1 (7))
Symbol
Parameter
Standard
Unit
Min.
Typ.
Max.
Program and Erase Endurance (3, 8, 9)
10,000 (4)
cycle
Word Program Time (VCC1=5.0V
)
25
s
Lock Bit Program Time
25
s
Block Erase Time
(VCC1=5.0V
)
4-Kbyte block
0.3
s
tPS
Flash Memory Circuit Stabilization Wait Time
15
s
Data Hold Time (5)
10
year
Table 5.8
Flash Memory Version Program / Erase Voltage and Read Operation Voltage
Characteristics (at Topr = 0 to 60
°C(D3, D5, U3, U5), Topr = -40 to 85 °C(D7, U7) / Topr =
-20 to 85
°C(D9, U9))
Flash Program, Erase Voltage
Flash Read Operation Voltage
VCC1 = 3.3 V ± 0.3 V or 5.0 V ± 0.5 V
VCC1=2.7 to 5.5 V
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