參數(shù)資料
型號(hào): M30625FGNGP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 14 MM, 0.65 MM PITCH, PLASTIC, QFP-80
文件頁(yè)數(shù): 30/67頁(yè)
文件大?。?/td> 2968K
代理商: M30625FGNGP
Mitsubishi microcomputers
M16C / 62N Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Description
1
------Table of Contents------
Description
The M16C/62N (80-pin version) group of single-chip microcomputers are built using the high-performance
silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in a 80-pin plastic molded
QFP. These single-chip microcomputers operate using sophisticated instructions featuring a high level of
instruction efficiency. With 1M bytes of address space, low voltage (2.4V(mask ROM version is 2.2V) to
3.6V), they are capable of executing instructions at high speed. They also feature a built-in multiplier and
DMAC, making them ideal for controlling office, communications, industrial equipment, and other high-
speed processing applications.
The M16C/62N (80-pin version) group includes a wide range of products with different internal memory
types and sizes and various package types.
Features
Memory capacity .................................. ROM (See Figure 1.1.3. ROM Expansion)
RAM 10K to 20K bytes
Shortest instruction execution time ...... 62.5ns (f(XIN)=16MHZ, VCC=3.0V to 3.6V)
142.9ns (f(XIN)=7MHZ, VCC=2.4V to 3.6V without software wait)
Supply voltage ..................................... 3.0V to 3.6V (f(XIN)=16MHZ, without software wait)
2.4V to 3.6V (f(XIN)=7MHZ, without software wait)
2.2V to 3.6V (f(XIN)=7MHZ, with software one-wait) :mask ROM version
Low power consumption ...................... 34.0mW (VCC = 3V, f(XIN)=10MHZ, without software wait)
66.0mW (VCC = 3.3V, f(XIN)=16MHZ, without software wait)
Interrupts .............................................. 25 internal and 5 external interrupt sources, 4 software
interrupt sources; 7 levels (including key input interrupt)
Multifunction 16-bit timer ...................... 5 output timers + 6 input timers (3 for timer function only)
Serial I/O .............................................. 5 channels (2 for UART or clock synchronous, 1 for UART, 2 for clock synchronous)
DMAC .................................................. 2 channels (trigger: 25 sources)
A-D converter ....................................... 10 bits X 8 channels (Expandable up to 18 channels)
D-A converter ....................................... 8 bits X 2 channels
CRC calculation circuit ......................... 1 circuit
Watchdog timer .................................... 1 line
Programmable I/O ............................... 70 lines
Input port ..............................................
_______
1 line (P85 shared with NMI pin)
Clock generating circuit ....................... 2 built-in clock generation circuits
(built-in feedback resistor, and external ceramic or quartz oscillator)
Note: Memory expansion mode and microprocessor mode are not supported.
Applications
Audio, cameras, office equipment, communications equipment, portable equipment
Timer ............................................................. 68
Serial I/O ....................................................... 86
A-D Converter ............................................. 127
D-A Converter ............................................. 137
CRC Calculation Circuit .............................. 139
Programmable I/O Ports ............................. 141
Electric Characteristics ............................... 151
Flash memory version ................................. 158
About the M16C/62N (80-pin version) group .. 7
Central Processing Unit (CPU) ..................... 11
Reset ............................................................. 14
Processor Mode ............................................ 21
Clock Generating Circuit ............................... 26
Protection ...................................................... 35
Interrupts ....................................................... 36
Watchdog Timer ............................................ 56
DMAC ........................................................... 58
Rev.1.1
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